PCI: dwc: ep: Add a generic dw_pcie_ep_linkdown() API to handle Link Down event

Per PCIe r6.0, sec 5.2, a Link Down event can happen under any of the
following circumstances:

  1. Fundamental/Hot reset
  2. Link disable transmission by upstream component
  3. Moving from L2/L3 to L0

In those cases, Link Down causes some non-sticky DWC registers to lose the
state (like REBAR, etc.), so drivers need to reinitialize them to function
properly once the link comes back again.

This is not a problem for drivers supporting PERST# IRQ, since they can
reinitialize the registers in the PERST# IRQ callback. But for the drivers
not supporting PERST#, there is no way they can reinitialize the registers
other than relying on Link Down IRQ received when the link goes down. So
add a DWC generic API dw_pcie_ep_linkdown() that reinitializes the
non-sticky registers and also notifies the EPF drivers about link going
down.

This API can also be used by the drivers supporting PERST# to handle the
scenario (2) mentioned above.

NOTE: For the sake of code organization, move the dw_pcie_ep_linkup()
definition just above dw_pcie_ep_linkdown().

Link: https://lore.kernel.org/linux-pci/20240430-pci-epf-rework-v4-8-22832d0d456f@linaro.org
Tested-by: Niklas Cassel <cassel@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
[bhelgaas: update spec citation]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Niklas Cassel <cassel@kernel.org>

diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index 51571da246016c41eb628c9fd3456e90f0c18d15..705533e789f35ecd5f292381d4b119c6b8ba8cc9 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -15,18 +15,6 @@
 #include <linux/pci-epc.h>
 #include <linux/pci-epf.h>
 
-/**
- * dw_pcie_ep_linkup - Notify EPF drivers about Link Up event
- * @ep: DWC EP device
- */
-void dw_pcie_ep_linkup(struct dw_pcie_ep *ep)
-{
-       struct pci_epc *epc = ep->epc;
-
-       pci_epc_linkup(epc);
-}
-EXPORT_SYMBOL_GPL(dw_pcie_ep_linkup);
-
 /**
  * dw_pcie_ep_init_notify - Notify EPF drivers about EPC initialization complete
  * @ep: DWC EP device
@@ -685,6 +673,34 @@ static unsigned int dw_pcie_ep_find_ext_capability(struct dw_pcie *pci, int cap)
        return 0;
 }
 
+static void dw_pcie_ep_init_non_sticky_registers(struct dw_pcie *pci)
+{
+       unsigned int offset;
+       unsigned int nbars;
+       u32 reg, i;
+
+       offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR);
+
+       dw_pcie_dbi_ro_wr_en(pci);
+
+       if (offset) {
+               reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL);
+               nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >>
+                       PCI_REBAR_CTRL_NBAR_SHIFT;
+
+               /*
+                * PCIe r6.0, sec 7.8.6.2 require us to support at least one
+                * size in the range from 1 MB to 512 GB. Advertise support
+                * for 1 MB BAR size only.
+                */
+               for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL)
+                       dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0);
+       }
+
+       dw_pcie_setup(pci);
+       dw_pcie_dbi_ro_wr_dis(pci);
+}
+
 /**
  * dw_pcie_ep_init_registers - Initialize DWC EP specific registers
  * @ep: DWC EP device
@@ -699,13 +715,11 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep)
        struct dw_pcie_ep_func *ep_func;
        struct device *dev = pci->dev;
        struct pci_epc *epc = ep->epc;
-       unsigned int offset, ptm_cap_base;
-       unsigned int nbars;
+       u32 ptm_cap_base, reg;
        u8 hdr_type;
        u8 func_no;
-       int i, ret;
        void *addr;
-       u32 reg;
+       int ret;
 
        hdr_type = dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE) &
                   PCI_HEADER_TYPE_MASK;
@@ -768,25 +782,8 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep)
        if (ep->ops->init)
                ep->ops->init(ep);
 
-       offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR);
        ptm_cap_base = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_PTM);
 
-       dw_pcie_dbi_ro_wr_en(pci);
-
-       if (offset) {
-               reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL);
-               nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >>
-                       PCI_REBAR_CTRL_NBAR_SHIFT;
-
-               /*
-                * PCIe r6.0, sec 7.8.6.2 require us to support at least one
-                * size in the range from 1 MB to 512 GB. Advertise support
-                * for 1 MB BAR size only.
-                */
-               for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL)
-                       dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, BIT(4));
-       }
-
        /*
         * PTM responder capability can be disabled only after disabling
         * PTM root capability.
@@ -803,8 +800,7 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep)
                dw_pcie_dbi_ro_wr_dis(pci);
        }
 
-       dw_pcie_setup(pci);
-       dw_pcie_dbi_ro_wr_dis(pci);
+       dw_pcie_ep_init_non_sticky_registers(pci);
 
        return 0;
 
@@ -815,6 +811,43 @@ err_remove_edma:
 }
 EXPORT_SYMBOL_GPL(dw_pcie_ep_init_registers);
 
+/**
+ * dw_pcie_ep_linkup - Notify EPF drivers about Link Up event
+ * @ep: DWC EP device
+ */
+void dw_pcie_ep_linkup(struct dw_pcie_ep *ep)
+{
+       struct pci_epc *epc = ep->epc;
+
+       pci_epc_linkup(epc);
+}
+EXPORT_SYMBOL_GPL(dw_pcie_ep_linkup);
+
+/**
+ * dw_pcie_ep_linkdown - Notify EPF drivers about Link Down event
+ * @ep: DWC EP device
+ *
+ * Non-sticky registers are also initialized before sending the notification to
+ * the EPF drivers. This is needed since the registers need to be initialized
+ * before the link comes back again.
+ */
+void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep)
+{
+       struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
+       struct pci_epc *epc = ep->epc;
+
+       /*
+        * Initialize the non-sticky DWC registers as they would've reset post
+        * Link Down. This is specifically needed for drivers not supporting
+        * PERST# as they have no way to reinitialize the registers before the
+        * link comes back again.
+        */
+       dw_pcie_ep_init_non_sticky_registers(pci);
+
+       pci_epc_linkdown(epc);
+}
+EXPORT_SYMBOL_GPL(dw_pcie_ep_linkdown);
+
 /**
  * dw_pcie_ep_init - Initialize the endpoint device
  * @ep: DWC EP device

diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 39ec253df6cf66b41604ccbaf50d0cf5e2e82591..5822eb09ead7896218afb79aaf7973e27fa875e0 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -681,6 +681,7 @@ static inline void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus,
 
 #ifdef CONFIG_PCIE_DW_EP
 void dw_pcie_ep_linkup(struct dw_pcie_ep *ep);
+void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep);
 int dw_pcie_ep_init(struct dw_pcie_ep *ep);
 int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep);
 void dw_pcie_ep_init_notify(struct dw_pcie_ep *ep);
@@ -701,6 +702,10 @@ static inline void dw_pcie_ep_linkup(struct dw_pcie_ep *ep)
 {
 }
 
+static inline void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep)
+{
+}
+
 static inline int dw_pcie_ep_init(struct dw_pcie_ep *ep)
 {
        return 0;