]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
sparc/PCI: Add mem64 resource parsing for root bus
authorYinghai Lu <yinghai@kernel.org>
Wed, 1 Apr 2015 02:57:48 +0000 (19:57 -0700)
committerAllen Pais <allen.pais@oracle.com>
Wed, 9 Sep 2015 18:54:00 +0000 (00:24 +0530)
Found "no compatible bridge window" warning in boot log from T5-8.

pci 0000:00:01.0: can't claim BAR 15 [mem 0x100000000-0x4afffffff pref]: no compatible bridge window

That resource is above 4G, but does not get offset correctly as
root bus only report io and mem32.

pci_sun4v f02dbcfc: PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [io  0x804000000000-0x80400fffffff] (bus address [0x0000-0xfffffff])
pci_bus 0000:00: root bus resource [mem 0x800000000000-0x80007effffff] (bus address [0x00000000-0x7effffff])
pci_bus 0000:00: root bus resource [bus 00-77]

Add mem64 handling in pci_common for sparc, so we can have 64bit resource
registered for root bus at first.

After patch, will have:
pci_sun4v f02dbcfc: PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [io  0x804000000000-0x80400fffffff] (bus address [0x0000-0xfffffff])
pci_bus 0000:00: root bus resource [mem 0x800000000000-0x80007effffff] (bus address [0x00000000-0x7effffff])
pci_bus 0000:00: root bus resource [mem 0x800100000000-0x8007ffffffff] (bus address [0x100000000-0x7ffffffff])
pci_bus 0000:00: root bus resource [bus 00-77]

Fixes: commit d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows")
Link: http://lkml.kernel.org/r/CAE9FiQU1gJY1LYrxs+ma5LCTEEe4xmtjRG0aXJ9K_Tsu+m9Wuw@mail.gmail.com
Reported-by: David Ahern <david.ahern@oracle.com>
Tested-by: David Ahern <david.ahern@oracle.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: <stable@vger.kernel.org> #3.19
(cherry picked from commit cd252f7298ec848ec23745938a84259999bdbe25)
(cherry picked from commit 4be8ce4e960931c18d3d5098bb9e2c6e0509b80e)

arch/sparc/kernel/pci.c
arch/sparc/kernel/pci_common.c
arch/sparc/kernel/pci_impl.h

index c928bc64b4bac1b1c5eb88c71c348469796883c5..bfd0b704385722a84a6763e100520496c47e5a41 100644 (file)
@@ -185,8 +185,10 @@ static unsigned long pci_parse_of_flags(u32 addr0)
 
        if (addr0 & 0x02000000) {
                flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
-               flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
                flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
+               if (addr0 & 0x01000000)
+                       flags |= IORESOURCE_MEM_64
+                                | PCI_BASE_ADDRESS_MEM_TYPE_64;
                if (addr0 & 0x40000000)
                        flags |= IORESOURCE_PREFETCH
                                 | PCI_BASE_ADDRESS_MEM_PREFETCH;
@@ -660,6 +662,9 @@ struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm,
                                pbm->io_space.start);
        pci_add_resource_offset(&resources, &pbm->mem_space,
                                pbm->mem_space.start);
+       if (pbm->mem64_space.flags)
+               pci_add_resource_offset(&resources, &pbm->mem64_space,
+                                       pbm->mem_space.start);
        pbm->busn.start = pbm->pci_first_busno;
        pbm->busn.end   = pbm->pci_last_busno;
        pbm->busn.flags = IORESOURCE_BUS;
index 944a06536ecc129ab81c9e758a6f89b92d3091fe..a859a867e498b751294fd8ecb6dae36799ca5242 100644 (file)
@@ -406,6 +406,7 @@ void pci_determine_mem_io_space(struct pci_pbm_info *pbm)
        }
 
        num_pbm_ranges = i / sizeof(*pbm_ranges);
+       memset(&pbm->mem64_space, 0, sizeof(struct resource));
 
        for (i = 0; i < num_pbm_ranges; i++) {
                const struct linux_prom_pci_ranges *pr = &pbm_ranges[i];
@@ -451,7 +452,11 @@ void pci_determine_mem_io_space(struct pci_pbm_info *pbm)
                        break;
 
                case 3:
-                       /* XXX 64-bit MEM handling XXX */
+                       /* 64-bit MEM handling */
+                       pbm->mem64_space.start = a;
+                       pbm->mem64_space.end = a + size - 1UL;
+                       pbm->mem64_space.flags = IORESOURCE_MEM;
+                       break;
 
                default:
                        break;
@@ -465,15 +470,21 @@ void pci_determine_mem_io_space(struct pci_pbm_info *pbm)
                prom_halt();
        }
 
-       printk("%s: PCI IO[%llx] MEM[%llx]\n",
+       printk("%s: PCI IO[%llx] MEM[%llx]",
               pbm->name,
               pbm->io_space.start,
               pbm->mem_space.start);
+       if (pbm->mem64_space.flags)
+               printk(" MEM64[%llx]",
+                      pbm->mem64_space.start);
+       printk("\n");
 
        pbm->io_space.name = pbm->mem_space.name = pbm->name;
 
        request_resource(&ioport_resource, &pbm->io_space);
        request_resource(&iomem_resource, &pbm->mem_space);
+       if (pbm->mem64_space.flags)
+               request_resource(&iomem_resource, &pbm->mem64_space);
 
        pci_register_legacy_regions(&pbm->io_space,
                                    &pbm->mem_space);
index 75803c780af3605681991c74271d941015a3dbd1..37222ca849df48df46ed45927686ef487f6f49bb 100644 (file)
@@ -97,6 +97,7 @@ struct pci_pbm_info {
        /* PBM I/O and Memory space resources. */
        struct resource                 io_space;
        struct resource                 mem_space;
+       struct resource                 mem64_space;
        struct resource                 busn;
 
        /* Base of PCI Config space, can be per-PBM or shared. */