&intel_dp->desc);
 }
 
+void intel_dp_update_sink_caps(struct intel_dp *intel_dp)
+{
+       intel_dp_set_sink_rates(intel_dp);
+       intel_dp_set_max_sink_lane_count(intel_dp);
+       intel_dp_set_common_rates(intel_dp);
+}
+
 static bool
 intel_dp_get_dpcd(struct intel_dp *intel_dp)
 {
                drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc,
                                 drm_dp_is_branch(intel_dp->dpcd));
 
-               intel_dp_set_sink_rates(intel_dp);
-               intel_dp_set_max_sink_lane_count(intel_dp);
-               intel_dp_set_common_rates(intel_dp);
+               intel_dp_update_sink_caps(intel_dp);
        }
 
        if (intel_dp_has_sink_count(intel_dp)) {
 
 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
 int intel_dp_max_common_rate(struct intel_dp *intel_dp);
 int intel_dp_max_common_lane_count(struct intel_dp *intel_dp);
+void intel_dp_update_sink_caps(struct intel_dp *intel_dp);
 
 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
                           u8 *link_bw, u8 *rate_select);