Blackfin: dpmc: bind to MMR names and not CPUs

Have the code work off of MMR names rather than CPU defines so there is
less code to tweak in the future with new parts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/arch/blackfin/mach-common/dpmc_modes.S b/arch/blackfin/mach-common/dpmc_modes.S
index 9cfdd49a312728a337e77c8fb78e8de3ede928d8..6ecc64e5a06aec97ec1f8e8dc7fc78a6e1fe76f9 100644 (file)
--- a/arch/blackfin/mach-common/dpmc_modes.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -238,18 +238,17 @@ ENTRY(_unset_dram_srfs)
 ENDPROC(_unset_dram_srfs)
 
 ENTRY(_set_sic_iwr)
-#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \
-       defined(CONFIG_BF538) || defined(CONFIG_BF539) || defined(CONFIG_BF51x)
+#ifdef SIC_IWR0
        P0.H = hi(SIC_IWR0);
        P0.L = lo(SIC_IWR0);
        P1.H = hi(SIC_IWR1);
        P1.L = lo(SIC_IWR1);
        [P1] = R1;
-#if defined(CONFIG_BF54x)
+# ifdef SIC_IWR2
        P1.H = hi(SIC_IWR2);
        P1.L = lo(SIC_IWR2);
        [P1] = R2;
-#endif
+# endif
 #else
        P0.H = hi(SIC_IWR);
        P0.L = lo(SIC_IWR);