]> www.infradead.org Git - qemu-nvme.git/commitdiff
target/mips: Fix store adress of high 64bit in helper_msa_st_b()
authorNi Hui <shuizhuyuanluo@126.com>
Wed, 4 May 2022 02:33:19 +0000 (10:33 +0800)
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>
Sat, 11 Jun 2022 09:34:12 +0000 (11:34 +0200)
This patch fix the issue that helper_msa_st_b() write high 64bit
data to where the low 64bit resides, leaving high 64bit undefined.

Fixes: 68ad9260e0 ("target/mips: Use 8-byte memory ops for msa load/store")
Signed-off-by: Ni Hui <shuizhuyuanluo@126.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220504023319.12923-1-shuizhuyuanluo@126.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
target/mips/tcg/msa_helper.c

index 4dde5d639ad4756e1d5c1945adcc00498450f4d2..736283e2af8cca4e4c7e40587ad1b151605d75d8 100644 (file)
@@ -8329,7 +8329,7 @@ void helper_msa_st_b(CPUMIPSState *env, uint32_t wd,
 
     /* Store 8 bytes at a time.  Vector element ordering makes this LE.  */
     cpu_stq_le_data_ra(env, addr + 0, pwd->d[0], ra);
-    cpu_stq_le_data_ra(env, addr + 0, pwd->d[1], ra);
+    cpu_stq_le_data_ra(env, addr + 8, pwd->d[1], ra);
 }
 
 void helper_msa_st_h(CPUMIPSState *env, uint32_t wd,