void __init plat_mem_setup(void)
 {
+       void *dtb;
+
        ioport_resource.start = IOPORT_RESOURCE_START;
        ioport_resource.end = IOPORT_RESOURCE_END;
        iomem_resource.start = IOMEM_RESOURCE_START;
 
        set_io_port_base((unsigned long) KSEG1);
 
+       if (fw_arg0 == -2) /* UHI interface */
+               dtb = (void *)fw_arg1;
+       else if (__dtb_start != __dtb_end)
+               dtb = (void *)__dtb_start;
+       else
+               panic("no dtb found");
+
        /*
-        * Load the builtin devicetree. This causes the chosen node to be
+        * Load the devicetree. This causes the chosen node to be
         * parsed resulting in our memory appearing
         */
-       __dt_setup_arch(__dtb_start);
+       __dt_setup_arch(dtb);
 }
 
 void __init device_tree_init(void)