arm64: dts: qcom: ipq9574: Add support for APSS clock controller

Add the APCS & A73 PLL nodes to support CPU frequency scaling.

Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230406061314.10916-5-quic_devipriy@quicinc.com

diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index fea15f3cf910064f71b0eca9848bd69ccdfdff42..b751d2a5b5b6e5704c9c8c4b008a6fc8f70da2ab 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -422,6 +422,24 @@
                        timeout-sec = <30>;
                };
 
+               apcs_glb: mailbox@b111000 {
+                       compatible = "qcom,ipq9574-apcs-apps-global",
+                                    "qcom,ipq6018-apcs-apps-global";
+                       reg = <0x0b111000 0x1000>;
+                       #clock-cells = <1>;
+                       clocks = <&a73pll>, <&xo_board_clk>;
+                       clock-names = "pll", "xo";
+                       #mbox-cells = <1>;
+               };
+
+               a73pll: clock@b116000 {
+                       compatible = "qcom,ipq9574-a73pll";
+                       reg = <0x0b116000 0x40>;
+                       #clock-cells = <0>;
+                       clocks = <&xo_board_clk>;
+                       clock-names = "xo";
+               };
+
                timer@b120000 {
                        compatible = "arm,armv7-timer-mem";
                        reg = <0x0b120000 0x1000>;