ASoC: SOF: Intel: hda-stream: use snd_sof_dsp_updateb() helper

No functionality change, only code consistency.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://lore.kernel.org/r/20221024165310.246183-16-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/sof/intel/hda-stream.c b/sound/soc/sof/intel/hda-stream.c
index 6d130b8028b1cb0a76af06b96a44a0e73d315198..1a39178cbf20f2342bd80b141f1c23d75a8a958c 100644 (file)
--- a/sound/soc/sof/intel/hda-stream.c
+++ b/sound/soc/sof/intel/hda-stream.c
@@ -398,7 +398,6 @@ int hda_dsp_iccmax_stream_hw_params(struct snd_sof_dev *sdev, struct hdac_ext_st
                                    struct snd_dma_buffer *dmab,
                                    struct snd_pcm_hw_params *params)
 {
-       struct hdac_bus *bus = sof_to_bus(sdev);
        struct hdac_stream *hstream = &hext_stream->hstream;
        int sd_offset = SOF_STREAM_SD_OFFSET(hstream);
        int ret;
@@ -456,7 +455,8 @@ int hda_dsp_iccmax_stream_hw_params(struct snd_sof_dev *sdev, struct hdac_ext_st
                                mask, mask);
 
        /* Follow HW recommendation to set the guardband value to 95us during FW boot */
-       snd_hdac_chip_updateb(bus, VS_LTRP, HDA_VS_INTEL_LTRP_GB_MASK, HDA_LTRP_GB_VALUE_US);
+       snd_sof_dsp_updateb(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_LTRP,
+                           HDA_VS_INTEL_LTRP_GB_MASK, HDA_LTRP_GB_VALUE_US);
 
        /* start DMA */
        snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset,

diff --git a/sound/soc/sof/intel/hda.h b/sound/soc/sof/intel/hda.h
index b2a785d0f0e943ec412ad80a6b63cd17339fb303..17ed7e60cae81c4b07243b8e6244433e62bde893 100644 (file)
--- a/sound/soc/sof/intel/hda.h
+++ b/sound/soc/sof/intel/hda.h
@@ -307,6 +307,7 @@
 /* Intel Vendor Specific Registers */
 #define HDA_VS_INTEL_EM2               0x1030
 #define HDA_VS_INTEL_EM2_L1SEN         BIT(13)
+#define HDA_VS_INTEL_LTRP              0x1048
 #define HDA_VS_INTEL_LTRP_GB_MASK      0x3F
 
 /*  HIPCI */