arm64: dts: renesas: r9a07g044: Add TSU node

Add TSU node to RZ/G2L SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211208142729.2456-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 439870930fb3f25dbedca309199c84fd57e6da36..ea528580f306356f7233df7294ff4b094c3c1611 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -539,6 +539,16 @@
                        };
                };
 
+               tsu: thermal@10059400 {
+                       compatible = "renesas,r9a07g044-tsu",
+                                    "renesas,rzg2l-tsu";
+                       reg = <0 0x10059400 0 0x400>;
+                       clocks = <&cpg CPG_MOD R9A07G044_TSU_PCLK>;
+                       resets = <&cpg R9A07G044_TSU_PRESETN>;
+                       power-domains = <&cpg>;
+                       #thermal-sensor-cells = <1>;
+               };
+
                sbc: spi@10060000 {
                        compatible = "renesas,r9a07g044-rpc-if",
                                     "renesas,rzg2l-rpc-if";
@@ -902,6 +912,22 @@
                };
        };
 
+       thermal-zones {
+               cpu-thermal {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+                       thermal-sensors = <&tsu 0>;
+
+                       trips {
+                               sensor_crit: sensor-crit {
+                                       temperature = <125000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,