MIPS: Octeon: Add DTS for EdgeRouter Lite

Add DTS for EdgeRouter Lite that is usable as is without any "pruning"
with APPENDED_DTB.

Compared to builtin generic DTB, we can avoid errors and delays from
probing non-existent I2C devices.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/boot/dts/cavium-octeon/ubnt_e100.dts b/arch/mips/boot/dts/cavium-octeon/ubnt_e100.dts
new file mode 100644 (file)
index 0000000..243e5dc
--- /dev/null
+++ b/arch/mips/boot/dts/cavium-octeon/ubnt_e100.dts
@@ -0,0 +1,59 @@
+/*
+ * Device tree source for EdgeRouter Lite.
+ *
+ * Written by: Aaro Koskinen <aaro.koskinen@iki.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/include/ "octeon_3xxx.dtsi"
+
+/ {
+       model = "ubnt,e100";
+
+       soc@0 {
+               smi0: mdio@1180000001800 {
+                       phy5: ethernet-phy@5 {
+                               reg = <5>;
+                               compatible = "ethernet-phy-ieee802.3-c22";
+                       };
+                       phy6: ethernet-phy@6 {
+                               reg = <6>;
+                               compatible = "ethernet-phy-ieee802.3-c22";
+                       };
+                       phy7: ethernet-phy@7 {
+                               reg = <7>;
+                               compatible = "ethernet-phy-ieee802.3-c22";
+                       };
+               };
+
+               pip: pip@11800a0000000 {
+                       interface@0 {
+                               ethernet@0 {
+                                       phy-handle = <&phy7>;
+                               };
+                               ethernet@1 {
+                                       phy-handle = <&phy6>;
+                               };
+                               ethernet@2 {
+                                       phy-handle = <&phy5>;
+                               };
+                       };
+               };
+
+               uart0: serial@1180000000800 {
+                       clock-frequency = <500000000>;
+               };
+
+               usbn: usbn@1180068000000 {
+                       refclk-frequency = <12000000>;
+                       refclk-type = "crystal";
+               };
+       };
+
+       aliases {
+               pip = &pip;
+       };
+};