drm/amdgpu: enable GFX Power Gating for GC IP v11.0.4

commit a89e2965da6e644729a8ee9c318b7fa9a2990353 upstream.

Enable GFX Power Gating control for GC IP v11.0.4.

Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: "Limonciello, Mario" <Mario.Limonciello@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 22fbe74d2b07fd152bf19019bcfba2373b7daf0e..c150314560a14a76fbb03c663cff29b64871c437 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -5030,6 +5030,7 @@ static void gfx_v11_cntl_power_gating(struct amdgpu_device *adev, bool enable)
        if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) {
                switch (adev->ip_versions[GC_HWIP][0]) {
                case IP_VERSION(11, 0, 1):
+               case IP_VERSION(11, 0, 4):
                        WREG32_SOC15(GC, 0, regRLC_PG_DELAY_3, RLC_PG_DELAY_3_DEFAULT_GC_11_0_1);
                        break;
                default:
@@ -5063,6 +5064,7 @@ static int gfx_v11_0_set_powergating_state(void *handle,
                amdgpu_gfx_off_ctrl(adev, enable);
                break;
        case IP_VERSION(11, 0, 1):
+       case IP_VERSION(11, 0, 4):
                gfx_v11_cntl_pg(adev, enable);
                amdgpu_gfx_off_ctrl(adev, enable);
                break;