arm64: dts: renesas: rzg2lc: Set Ethernet PVDD to 1.8V

On the RZ/G2LC SMARC SOM, the RGMII interface between the SoC and the
Ethernet PHY operates at 1.8V.

The power supply for this interface may be correctly configured in
u-boot, but the kernel should not be relying on this. Now that the
RZ/G2L pinctrl driver supports configuring the Ethernet power supply
voltage, we can simply specify the desired voltage in the device tree.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20240625200316.4282-9-paul.barker.ct@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi
index 664311fd2098e54faade867ec401331b654fdf96..b4ef5ea8a9e3457a3a0e0211f2b8f55f7ab31473 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi
@@ -130,6 +130,7 @@
        eth0_pins: eth0 {
                txc {
                        pinmux = <RZG2L_PORT_PINMUX(20, 0, 1)>; /* ET0_TXC */
+                       power-source = <1800>;
                        output-enable;
                };
 
@@ -147,8 +148,12 @@
                                 <RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */
                                 <RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */
                                 <RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */
-                                <RZG2L_PORT_PINMUX(26, 1, 1)>, /* ET0_RXD3 */
-                                <RZG2L_PORT_PINMUX(0, 0, 1)>;  /* IRQ0 */
+                                <RZG2L_PORT_PINMUX(26, 1, 1)>; /* ET0_RXD3 */
+                       power-source = <1800>;
+               };
+
+               irq {
+                       pinmux = <RZG2L_PORT_PINMUX(0, 0, 1)>;  /* IRQ0 */
                };
        };