FLASH_DMA_CURRENT_DESC_EXT,
 };
 
+/* flash_dma registers v0*/
+static const u16 flash_dma_regs_v0[] = {
+       [FLASH_DMA_REVISION]            = 0x00,
+       [FLASH_DMA_FIRST_DESC]          = 0x04,
+       [FLASH_DMA_CTRL]                = 0x08,
+       [FLASH_DMA_MODE]                = 0x0c,
+       [FLASH_DMA_STATUS]              = 0x10,
+       [FLASH_DMA_INTERRUPT_DESC]      = 0x14,
+       [FLASH_DMA_ERROR_STATUS]        = 0x18,
+       [FLASH_DMA_CURRENT_DESC]        = 0x1c,
+};
+
 /* flash_dma registers v1*/
 static const u16 flash_dma_regs_v1[] = {
        [FLASH_DMA_REVISION]            = 0x00,
        /* flash_dma register offsets */
        if (ctrl->nand_version >= 0x0703)
                ctrl->flash_dma_offsets = flash_dma_regs_v4;
+       else if (ctrl->nand_version == 0x0602)
+               ctrl->flash_dma_offsets = flash_dma_regs_v0;
        else
                ctrl->flash_dma_offsets = flash_dma_regs_v1;
 }
 
        flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC, lower_32_bits(desc));
        (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC);
-       flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, upper_32_bits(desc));
-       (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT);
+       if (ctrl->nand_version > 0x0602) {
+               flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT,
+                                upper_32_bits(desc));
+               (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT);
+       }
 
        /* Start FLASH_DMA engine */
        ctrl->dma_pending = true;