i2c0: i2c@e6508000 {
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "renesas,i2c-r8a7790";
+               compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6508000 0 0x40>;
                interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
        i2c1: i2c@e6518000 {
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "renesas,i2c-r8a7790";
+               compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6518000 0 0x40>;
                interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
        i2c2: i2c@e6530000 {
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "renesas,i2c-r8a7790";
+               compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6530000 0 0x40>;
                interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
        i2c3: i2c@e6540000 {
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "renesas,i2c-r8a7790";
+               compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
                reg = <0 0xe6540000 0 0x40>;
                interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7790_CLK_I2C3>;