Replaced config_FADS860T.h with the one provided by Christian Vejlbo.

The previous one was known to not work, and Christian says that this
new one works for him.
Also deleted some unused CPM defines that were holdovers from the 8xxROM era.

diff --git a/include/config_FADS860T.h b/include/config_FADS860T.h
index 1020f253cdbdb34837ac4bb3f0871d88313b5499..b757d4a81a61ab7badee423a953f740feae4321b 100644 (file)
--- a/include/config_FADS860T.h
+++ b/include/config_FADS860T.h
@@ -1,4 +1,4 @@
- /*
+/*
   * A collection of structures, addresses, and values associated with
   * the Motorola 860T FADS board.  Copied from the MBX stuff.
   * Magnus Damm added defines for 8xxrom and extended bd_info.
@@ -43,20 +43,26 @@
 #undef CONFIG_8xx_CONS_SMC2
 #define CONFIG_BAUDRATE                9600
 
-#define MPC8XX_FACT    10                              /* Multiply by 10               */
+#if 0
+#define MPC8XX_FACT    10                              /* Multiply by 10       */
 #define MPC8XX_XIN     50000000                /* 50 MHz in    */
+#else
+#define MPC8XX_FACT    12                              /* Multiply by 12       */
+#define MPC8XX_XIN     4000000         /* 4 MHz in     */
 #define MPC8XX_HZ ((MPC8XX_XIN) * (MPC8XX_FACT))
+#endif
 
 #if 1
 #define CONFIG_8xx_BOOTDELAY   -1      /* autoboot disabled            */
 #define CONFIG_8xx_TFTP_MODE
+#define CONFIG_BOOTDELAY CONFIG_8xx_BOOTDELAY  
 #else
 #define CONFIG_8xx_BOOTDELAY   5       /* autoboot after 5 seconds     */
 #undef CONFIG_8xx_TFTP_MODE
 #endif
 
 #define CONFIG_DRAM_SPEED      (CONFIG_8xx_BUSCLOCK)   /* MHz          */
-#define CONFIG_BOOTCOMMAND     "bootm FE020000"        /* autoboot command */
+#define CONFIG_BOOTCOMMAND     "bootm 2800100" /* autoboot command */
 #define CONFIG_BOOTARGS                " "
 /*
  * Miscellaneous configurable options
@@ -68,8 +74,12 @@
 #define        CFG_MAXARGS             8               /* max number of command args   */
 #define CFG_BARGSIZE   CFG_CBSIZE      /* Boot Argument Buffer Size    */
 
-#define CFG_MEMTEST_START      0x0400000       /* memtest works on     */
-#define CFG_MEMTEST_END                0x0800000       /* 4 ... 8 MB in DRAM   */
+#define CFG_MEMTEST_START      0x0000000       /* memtest works on     */
+#define CFG_MEMTEST_END                0x0400000       /* 1 ... 4 MB in DRAM   */
+
+#define CFG_TFTP_LOADADDR 0x00100000
+
+
 /*
  * Low Level Configuration Settings
  * (address mappings, register initial values, etc.)
@@ -87,12 +97,18 @@
  * Please note that CFG_SDRAM_BASE _must_ start at 0
  */
 #define        CFG_SDRAM_BASE          0x00000000
-#define CFG_FLASH_BASE         0xFE000000
+
+#define CFG_FLASH_BASE         0x2800000
+
 #define CFG_FLASH_SIZE         ((uint)(8 * 1024 * 1024))       /* max 8Mbyte */
-#define        CFG_MONITOR_LEN         (256 << 10)                                     /* Reserve 128 kB for Monitor   */
-#define CFG_HWINFO_LEN         0x0040                                          /* Length of HW Info Data       */
+
+#define        CFG_MONITOR_LEN         (384 << 10)                     /* Reserve 384 kB for Monitor   */
+#define CFG_HWINFO_LEN         0x0040                          /* Length of HW Info Data       */
+#define        CFG_MALLOC_LEN          (384 << 10)                     /* Reserve 384 kB for malloc()  */
+
+#if 0
 #define CFG_HWINFO_ADDR                (CFG_FLASH_BASE + CFG_MONITOR_LEN - CFG_HWINFO_LEN)
-#define        CFG_MALLOC_LEN          (256 << 10)                                     /* Reserve 128 kB for malloc()  */
+#endif
 
 /*
  * For booting Linux, the board info and command line data
@@ -103,13 +119,16 @@
 /*-----------------------------------------------------------------------
  * FLASH organization
  */
-#define CFG_MAX_FLASH_BANKS    2                       /* max number of memory banks           */
+#define CFG_MAX_FLASH_BANKS    1                       /* max number of memory banks           */
 #define CFG_MAX_FLASH_SECT     8                       /* max number of sectors on one chip    */
 
 #define CFG_FLASH_ERASE_TOUT   120000  /* Timeout for Flash Erase (in ms)      */
 #define CFG_FLASH_WRITE_TOUT   500             /* Timeout for Flash Write (in ms)      */
 
+#if 0
 #define        CFG_FLASH_ENV_ALIGN     15      /*  Bitshift for Environment Sector     */
+#endif
+#define CFG_FLASH_ENV_OFFSET 0x00040000
 #define        CFG_FLASH_ENV_SIZE      0x4000  /* Total Size of Environment Sector     */
 /* the other CS:s are determined by looking at parameters in BCSRx */
 
@@ -154,7 +173,7 @@
  *-----------------------------------------------------------------------
  * set the PLL, the low-power modes and the reset control (15-29) 
  */
-#define CFG_PLPRCR     (((MPC8XX_FACT-1) << 20) | 0x4000)
+#define CFG_PLPRCR     (PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
 
 /*-----------------------------------------------------------------------
  * SCCR - System Clock and reset Control Register              15-27
@@ -187,12 +206,11 @@
  */
 /* the other CS:s are determined by looking at parameters in BCSRx */
 
-
-#define BCSR_ADDR              ((uint) 0xFF010000)
+#define BCSR_ADDR              ((uint) 0x2100000)
 #define BCSR_SIZE              ((uint)(64 * 1024))
 
-#define FLASH_BASE0_PRELIM     0xFE000000      /* FLASH bank #0        */
-#define FLASH_BASE1_PRELIM     0xFF010000      /* FLASH bank #0        */
+#define FLASH_BASE0_PRELIM     0x2800000       /* FLASH bank #0        */
+#define FLASH_BASE1_PRELIM     0x0     /* FLASH bank #1        */
 
 #define CFG_REMAP_OR_AM                0x80000000      /* OR addr mask */
 #define CFG_PRELIM_OR_AM       0xFFF00000      /* OR addr mask */
@@ -201,12 +219,22 @@
 #define CFG_OR_TIMING_FLASH    (OR_CSNT_SAM  | OR_ACS_DIV4 | OR_BI | OR_SCY_3_CLK | OR_TRLX)
 
 #define CFG_OR0_REMAP  (CFG_REMAP_OR_AM  | CFG_OR_TIMING_FLASH)
+
+#ifdef USE_REAL_FLASH_VALUES
+/* 
+ * These values fit our FADS860T ... 
+ * The "default" behaviour with 1Mbyte initial doesn't work for us!
+ */
+#define CFG_OR0_PRELIM 0x0FFC00D34 /* Real values for the board */
+#define CFG_BR0_PRELIM 0x02800001  /* Real values for the board */
+#else
 #define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH)   /* 1 Mbyte until detected and only 1 Mbyte is needed*/
 #define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_V )
+#endif
 
 /* BCSRx - Board Control and Status Registers */
 #define CFG_OR1_REMAP  CFG_OR0_REMAP
-#define CFG_OR1_PRELIM 0xffff8110                                                                      /* 64Kbyte address space */
+#define CFG_OR1_PRELIM 0xffff8110                              /* 64Kbyte address space */
 #define CFG_BR1_PRELIM ((BCSR_ADDR) | BR_V )
 
 
@@ -316,13 +344,42 @@
 #ifdef CONFIG_MPC860T
 #define BCSR4_FETH_EN            ((uint)0x08000000)
 #endif /* CONFIG_MPC860T */
+#ifdef CONFIG_MPC823
 #define BCSR4_USB_SPEED          ((uint)0x04000000)
+#endif /* CONFIG_MPC823 */
+#ifdef CONFIG_MPC860T
+#define BCSR4_FETHCFG0           ((uint)0x04000000)
+#endif /* CONFIG_MPC860T */
+#ifdef CONFIG_MPC823
 #define BCSR4_VCCO               ((uint)0x02000000)
+#endif /* CONFIG_MPC823 */
+#ifdef CONFIG_MPC860T
+#define BCSR4_FETHFDE            ((uint)0x02000000)
+#endif /* CONFIG_MPC860T */
+#ifdef CONFIG_MPC823
 #define BCSR4_VIDEO_ON           ((uint)0x00800000)
+#endif /* CONFIG_MPC823 */
+#ifdef CONFIG_MPC823
 #define BCSR4_VDO_EKT_CLK_EN     ((uint)0x00400000)
+#endif /* CONFIG_MPC823 */
+#ifdef CONFIG_MPC860T
+#define BCSR4_FETHCFG1           ((uint)0x00400000)
+#endif /* CONFIG_MPC860T */
+#ifdef CONFIG_MPC823
 #define BCSR4_VIDEO_RST          ((uint)0x00200000)
+#endif /* CONFIG_MPC823 */
+#ifdef CONFIG_MPC860T
+#define BCSR4_FETHRST            ((uint)0x00200000)
+#endif /* CONFIG_MPC860T */
+#ifdef CONFIG_MPC823
 #define BCSR4_MODEM_EN           ((uint)0x00100000)
+#endif /* CONFIG_MPC823 */
+#ifdef CONFIG_MPC823
 #define BCSR4_DATA_VOICE         ((uint)0x00080000)
+#endif /* CONFIG_MPC823 */
+#ifdef CONFIG_MPC850
+#define BCSR4_DATA_VOICE         ((uint)0x00080000)
+#endif /* CONFIG_MPC50 */
 
 #define CONFIG_DRAM_50MHZ              1
 #define CONFIG_SDRAM_50MHZ
@@ -343,16 +400,6 @@
 */
 #define _MACH_8xx (_MACH_fads)
 
-/*
- * MPC8xx CPM Options
- */
-#define CONFIG_SCC_ENET 1
-#define CONFIG_SCC1_ENET 1
-#define CONFIG_FEC_ENET 1
-#undef  CONFIG_CPM_IIC
-#undef  CONFIG_UCODE_PATCH
-
-
 #define CONFIG_DISK_SPINUP_TIME 1000000