x86/boot/compressed/64: Explain paging_prepare()'s return value

paging_prepare() returns a two-quadword structure which lands
into RDX:RAX:

  - Address of the trampoline is returned in RAX.
  - Non zero RDX means trampoline needs to enable 5-level paging.

Document that explicitly.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: dave.hansen@linux.intel.com
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Kyle D Pelton <kyle.d.pelton@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Wei Huang <wei@redhat.com>
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/20190206154756.matwldebbxkmlnae@black.fi.intel.com

diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
index b27b338d2f6d7f3c015f861b91940e9f0b26d0dd..73b9d7e91a9cabf5264f934dc3fdcb270a051cae 100644 (file)
--- a/arch/x86/boot/compressed/head_64.S
+++ b/arch/x86/boot/compressed/head_64.S
@@ -358,8 +358,11 @@ ENTRY(startup_64)
         * paging_prepare() sets up the trampoline and checks if we need to
         * enable 5-level paging.
         *
-        * Address of the trampoline is returned in RAX.
-        * Non zero RDX on return means we need to enable 5-level paging.
+        * paging_prepare() returns a two-quadword structure which lands
+        * into RDX:RAX:
+        *   - Address of the trampoline is returned in RAX.
+        *   - Non zero RDX means trampoline needs to enable 5-level
+        *     paging.
         *
         * RSI holds real mode data and needs to be preserved across
         * this function call.
@@ -565,7 +568,7 @@ adjust_got:
  *
  * RDI contains the return address (might be above 4G).
  * ECX contains the base address of the trampoline memory.
- * Non zero RDX on return means we need to enable 5-level paging.
+ * Non zero RDX means trampoline needs to enable 5-level paging.
  */
 ENTRY(trampoline_32bit_src)
        /* Set up data and stack segments */