]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
igb: Loopback functionality supports for i350 devices
authorAkeem G. Abodunrin <akeem.g.abodunrin@intel.com>
Thu, 8 Sep 2011 20:39:48 +0000 (20:39 +0000)
committerJoe Jin <joe.jin@oracle.com>
Thu, 17 May 2012 12:59:09 +0000 (20:59 +0800)
This patch adds VMDq loopback pf support for i350 devices. The patch
is necessary since the register that enabled loopback was moved and
renamed from DTXSWC to TXSWC.

(cherry picked from commit ca2e3e7ec98937e12df4bbdcc9a367b8768290ce)
Signed-off-by: "Akeem G. Abodunrin" <akeem.g.abodunrin@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Joe Jin <joe.jin@oracle.com>
drivers/net/igb/e1000_82575.c
drivers/net/igb/e1000_regs.h

index 3771bd20f437191fe3b55f42250f6d2a70042eea..6580cea796c511368d11f378b30d76db5f978680 100644 (file)
@@ -1580,14 +1580,31 @@ void igb_vmdq_set_anti_spoofing_pf(struct e1000_hw *hw, bool enable, int pf)
  **/
 void igb_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable)
 {
-       u32 dtxswc = rd32(E1000_DTXSWC);
+       u32 dtxswc;
+
+       switch (hw->mac.type) {
+       case e1000_82576:
+               dtxswc = rd32(E1000_DTXSWC);
+               if (enable)
+                       dtxswc |= E1000_DTXSWC_VMDQ_LOOPBACK_EN;
+               else
+                       dtxswc &= ~E1000_DTXSWC_VMDQ_LOOPBACK_EN;
+               wr32(E1000_DTXSWC, dtxswc);
+               break;
+       case e1000_i350:
+               dtxswc = rd32(E1000_TXSWC);
+               if (enable)
+                       dtxswc |= E1000_DTXSWC_VMDQ_LOOPBACK_EN;
+               else
+                       dtxswc &= ~E1000_DTXSWC_VMDQ_LOOPBACK_EN;
+               wr32(E1000_TXSWC, dtxswc);
+               break;
+       default:
+               /* Currently no other hardware supports loopback */
+               break;
+       }
 
-       if (enable)
-               dtxswc |= E1000_DTXSWC_VMDQ_LOOPBACK_EN;
-       else
-               dtxswc &= ~E1000_DTXSWC_VMDQ_LOOPBACK_EN;
 
-       wr32(E1000_DTXSWC, dtxswc);
 }
 
 /**
index 0990f6d860c7477bc7eba8c2380f9ff1539953a9..0a860bc1198ef977f984579a2f9dd0656e1d6ae2 100644 (file)
 #define E1000_RPLOLR    0x05AF0 /* Replication Offload - RW */
 #define E1000_UTA       0x0A000 /* Unicast Table Array - RW */
 #define E1000_IOVTCL    0x05BBC /* IOV Control Register */
+#define E1000_TXSWC     0x05ACC /* Tx Switch Control */
 /* These act per VF so an array friendly macro is used */
 #define E1000_P2VMAILBOX(_n)   (0x00C00 + (4 * (_n)))
 #define E1000_VMBMEM(_n)       (0x00800 + (64 * (_n)))