drm/i915: Add Wa_14016291713

We already disable FBC when PSR2 is enabled on display version 12 and
above; this new workaround now requires that we do the same with PSR1 on
display versions 12 and 13.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220708215804.2889246-2-matthew.d.roper@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 8b807284cde1f76a43f4a77f2811e3545825e636..33f52feb622a254a09a1f10fb598dc186ac64602 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1097,6 +1097,12 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
                return 0;
        }
 
+       /* Wa_14016291713 */
+       if (IS_DISPLAY_VER(i915, 12, 13) && crtc_state->has_psr) {
+               plane_state->no_fbc_reason = "PSR1 enabled (Wa_14016291713)";
+               return 0;
+       }
+
        if (!pixel_format_is_valid(plane_state)) {
                plane_state->no_fbc_reason = "pixel format not supported";
                return 0;