- tx-fifo-resize: determines if the FIFO *has* to be reallocated.
  - snps,disable_scramble_quirk: true when SW should disable data scrambling.
        Only really useful for FPGA builds.
+ - snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
+ - snps,lpm-nyet-threshold: LPM NYET threshold
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
 
        struct device_node      *node = dev->of_node;
        struct resource         *res;
        struct dwc3             *dwc;
+       u8                      lpm_nyet_threshold;
 
        int                     ret;
 
         */
        res->start -= DWC3_GLOBALS_REGS_START;
 
+       /* default to highest possible threshold */
+       lpm_nyet_threshold = 0xff;
+
        if (node) {
                dwc->maximum_speed = of_usb_get_maximum_speed(node);
+               dwc->has_lpm_erratum = of_property_read_bool(node,
+                               "snps,has-lpm-erratum");
+               of_property_read_u8(node, "snps,lpm-nyet-threshold",
+                               &lpm_nyet_threshold);
 
-               dwc->needs_fifo_resize = of_property_read_bool(node, "tx-fifo-resize");
+               dwc->needs_fifo_resize = of_property_read_bool(node,
+                               "tx-fifo-resize");
                dwc->dr_mode = of_usb_get_dr_mode(node);
 
                dwc->disable_scramble_quirk = of_property_read_bool(node,
                                "snps,disable_scramble_quirk");
        } else if (pdata) {
                dwc->maximum_speed = pdata->maximum_speed;
+               dwc->has_lpm_erratum = pdata->has_lpm_erratum;
+               if (pdata->lpm_nyet_threshold)
+                       lpm_nyet_threshold = pdata->lpm_nyet_threshold;
 
                dwc->needs_fifo_resize = pdata->tx_fifo_resize;
                dwc->dr_mode = pdata->dr_mode;
        if (dwc->maximum_speed == USB_SPEED_UNKNOWN)
                dwc->maximum_speed = USB_SPEED_SUPER;
 
+       dwc->lpm_nyet_threshold = lpm_nyet_threshold;
+
        ret = dwc3_core_get_phy(dwc);
        if (ret)
                return ret;
 
 #define DWC3_DCTL_TRGTULST_SS_INACT    (DWC3_DCTL_TRGTULST(6))
 
 /* These apply for core versions 1.94a and later */
-#define DWC3_DCTL_KEEP_CONNECT (1 << 19)
-#define DWC3_DCTL_L1_HIBER_EN  (1 << 18)
-#define DWC3_DCTL_CRS          (1 << 17)
-#define DWC3_DCTL_CSS          (1 << 16)
+#define DWC3_DCTL_LPM_ERRATA_MASK      DWC3_DCTL_LPM_ERRATA(0xf)
+#define DWC3_DCTL_LPM_ERRATA(n)                ((n) << 20)
 
-#define DWC3_DCTL_INITU2ENA    (1 << 12)
-#define DWC3_DCTL_ACCEPTU2ENA  (1 << 11)
-#define DWC3_DCTL_INITU1ENA    (1 << 10)
-#define DWC3_DCTL_ACCEPTU1ENA  (1 << 9)
-#define DWC3_DCTL_TSTCTRL_MASK (0xf << 1)
+#define DWC3_DCTL_KEEP_CONNECT         (1 << 19)
+#define DWC3_DCTL_L1_HIBER_EN          (1 << 18)
+#define DWC3_DCTL_CRS                  (1 << 17)
+#define DWC3_DCTL_CSS                  (1 << 16)
+
+#define DWC3_DCTL_INITU2ENA            (1 << 12)
+#define DWC3_DCTL_ACCEPTU2ENA          (1 << 11)
+#define DWC3_DCTL_INITU1ENA            (1 << 10)
+#define DWC3_DCTL_ACCEPTU1ENA          (1 << 9)
+#define DWC3_DCTL_TSTCTRL_MASK         (0xf << 1)
 
 #define DWC3_DCTL_ULSTCHNGREQ_MASK     (0x0f << 5)
 #define DWC3_DCTL_ULSTCHNGREQ(n) (((n) << 5) & DWC3_DCTL_ULSTCHNGREQ_MASK)
  * @regset: debugfs pointer to regdump file
  * @test_mode: true when we're entering a USB test mode
  * @test_mode_nr: test feature selector
+ * @lpm_nyet_threshold: LPM NYET response threshold
  * @delayed_status: true when gadget driver asks for delayed status
  * @ep0_bounced: true when we used bounce buffer
  * @ep0_expect_in: true when we expect a DATA IN transfer
  * @has_hibernation: true when dwc3 was configured with Hibernation
+ * @has_lpm_erratum: true when core was configured with LPM Erratum. Note that
+ *                     there's now way for software to detect this in runtime.
  * @is_selfpowered: true when we are selfpowered
  * @is_fpga: true when we are using the FPGA board
  * @needs_fifo_resize: not all users might want fifo resizing, flag it
 
        u8                      test_mode;
        u8                      test_mode_nr;
+       u8                      lpm_nyet_threshold;
 
        unsigned                delayed_status:1;
        unsigned                ep0_bounced:1;
        unsigned                ep0_expect_in:1;
        unsigned                has_hibernation:1;
+       unsigned                has_lpm_erratum:1;
        unsigned                is_selfpowered:1;
        unsigned                is_fpga:1;
        unsigned                needs_fifo_resize:1;
 
                 */
                reg |= DWC3_DCTL_HIRD_THRES(12);
 
+               /*
+                * When dwc3 revisions >= 2.40a, LPM Erratum is enabled and
+                * DCFG.LPMCap is set, core responses with an ACK and the
+                * BESL value in the LPM token is less than or equal to LPM
+                * NYET threshold.
+                */
+               WARN_ONCE(dwc->revision < DWC3_REVISION_240A
+                               && dwc->has_lpm_erratum,
+                               "LPM Erratum not available on dwc3 revisisions < 2.40a\n");
+
+               if (dwc->has_lpm_erratum && dwc->revision >= DWC3_REVISION_240A)
+                       reg |= DWC3_DCTL_LPM_ERRATA(dwc->lpm_nyet_threshold);
+
                dwc3_writel(dwc->regs, DWC3_DCTL, reg);
        } else {
                reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 
        enum usb_dr_mode dr_mode;
        bool tx_fifo_resize;
 
+       u8 lpm_nyet_threshold;
+
        unsigned disable_scramble_quirk:1;
+       unsigned has_lpm_erratum:1;
 };