perf arm-spe: Show instruction sample types by default

Instruction sample types are enabled in the default itrace options in
perf, but this never applied to SPE because the default nanoseconds
period isn't supported.

This meant that instructions ended up being opt-in by the user only when
they requested an instruction based period.

Change the default period type to instructions so that instruction
samples are generated by default. This can overridden by specifying any
--itrace option.

This solves a common complaint from users that the unfiltered SPE
samples appear to be missing, and only the samples that have memory
flags set appear in the various memory groups.

Signed-off-by: James Clark <james.clark@linaro.org>
Tested-by: Leo Yan <leo.yan@arm.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ben Gainey <Ben.Gainey@arm.com>
Cc: George Wort <George.Wort@arm.com>
Cc: Graham Woodward <Graham.Woodward@arm.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Leo Yan <leo.yan@linux.dev>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Michael Williams <Michael.Williams@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c
index 8942fa598a84fb70f8c66649395bfbedcd42d380..b33a0a170ef87671e07997f1ed7fb86f4d452300 100644 (file)
--- a/tools/perf/util/arm-spe.c
+++ b/tools/perf/util/arm-spe.c
@@ -1871,10 +1871,14 @@ int arm_spe_process_auxtrace_info(union perf_event *event,
        if (dump_trace)
                return 0;
 
-       if (session->itrace_synth_opts && session->itrace_synth_opts->set)
+       if (session->itrace_synth_opts && session->itrace_synth_opts->set) {
                spe->synth_opts = *session->itrace_synth_opts;
-       else
+       } else {
                itrace_synth_opts__set_default(&spe->synth_opts, false);
+               /* Default nanoseconds period not supported */
+               spe->synth_opts.period_type = PERF_ITRACE_PERIOD_INSTRUCTIONS;
+               spe->synth_opts.period = 1;
+       }
 
        err = arm_spe_synth_events(spe, session);
        if (err)