ARM: dt: tegra: Add Tegra APB DMA device tree binding

Document binding, and add the node to tegra*.dtsi.

The driver isn't actually instantiated from this node yet, but the I2S
binding will rely on being able to refer to the APB DMA node using a
phandle.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
new file mode 100644 (file)
index 0000000..90fa7da
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
@@ -0,0 +1,30 @@
+* NVIDIA Tegra APB DMA controller
+
+Required properties:
+- compatible: Should be "nvidia,<chip>-apbdma"
+- reg: Should contain DMA registers location and length. This shuld include
+  all of the per-channel registers.
+- interrupts: Should contain all of the per-channel DMA interrupts.
+
+Examples:
+
+apbdma: dma@6000a000 {
+       compatible = "nvidia,tegra20-apbdma";
+       reg = <0x6000a000 0x1200>;
+       interrupts = < 0 136 0x04
+                      0 137 0x04
+                      0 138 0x04
+                      0 139 0x04
+                      0 140 0x04
+                      0 141 0x04
+                      0 142 0x04
+                      0 143 0x04
+                      0 144 0x04
+                      0 145 0x04
+                      0 146 0x04
+                      0 147 0x04
+                      0 148 0x04
+                      0 149 0x04
+                      0 150 0x04
+                      0 151 0x04 >;
+};

diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index c1622413490a3034785505ec8a02f76c5d19cc44..603dc2114ac66adc7e041986125ba4449a501eb0 100644 (file)
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -12,6 +12,27 @@
                      < 0x50040100 0x0100 >;
        };
 
+       apbdma: dma@6000a000 {
+               compatible = "nvidia,tegra20-apbdma";
+               reg = <0x6000a000 0x1200>;
+               interrupts = < 0 104 0x04
+                              0 105 0x04
+                              0 106 0x04
+                              0 107 0x04
+                              0 108 0x04
+                              0 109 0x04
+                              0 110 0x04
+                              0 111 0x04
+                              0 112 0x04
+                              0 113 0x04
+                              0 114 0x04
+                              0 115 0x04
+                              0 116 0x04
+                              0 117 0x04
+                              0 118 0x04
+                              0 119 0x04 >;
+       };
+
        i2c@7000c000 {
                #address-cells = <1>;
                #size-cells = <0>;

diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 2b3f6cd3c79850f3a9ec1eab78cc53d474d31378..8a7e230832d7dbe8667ce845c67221dd24e1fc6d 100644 (file)
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -12,6 +12,43 @@
                      < 0x50040100 0x0100 >;
        };
 
+       apbdma: dma@6000a000 {
+               compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
+               reg = <0x6000a000 0x1400>;
+               interrupts = < 0 104 0x04
+                              0 105 0x04
+                              0 106 0x04
+                              0 107 0x04
+                              0 108 0x04
+                              0 109 0x04
+                              0 110 0x04
+                              0 111 0x04
+                              0 112 0x04
+                              0 113 0x04
+                              0 114 0x04
+                              0 115 0x04
+                              0 116 0x04
+                              0 117 0x04
+                              0 118 0x04
+                              0 119 0x04
+                              0 128 0x04
+                              0 129 0x04
+                              0 130 0x04
+                              0 131 0x04
+                              0 132 0x04
+                              0 133 0x04
+                              0 134 0x04
+                              0 135 0x04
+                              0 136 0x04
+                              0 137 0x04
+                              0 138 0x04
+                              0 139 0x04
+                              0 140 0x04
+                              0 141 0x04
+                              0 142 0x04
+                              0 143 0x04 >;
+       };
+
        i2c@7000c000 {
                #address-cells = <1>;
                #size-cells = <0>;