arm64: Add capability denoting FEAT_RASv1p1

Detecting FEAT_RASv1p1 is rather complicated, as there are two
ways for the architecture to advertise the same thing (always a
delight...).

Add a capability that will advertise this in a synthetic way to
the rest of the kernel.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Link: https://lore.kernel.org/r/20250817202158.395078-2-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 4dece9ca68bc6be6ce47861a046b9f6434d57195..22a94e548362d1c8d2d03a87ba4739cbbda45c06 100644 (file)
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -2235,6 +2235,24 @@ static void cpu_clear_disr(const struct arm64_cpu_capabilities *__unused)
        /* Firmware may have left a deferred SError in this register. */
        write_sysreg_s(0, SYS_DISR_EL1);
 }
+static bool has_rasv1p1(const struct arm64_cpu_capabilities *__unused, int scope)
+{
+       const struct arm64_cpu_capabilities rasv1p1_caps[] = {
+               {
+                       ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, RAS, V1P1)
+               },
+               {
+                       ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, RAS, IMP)
+               },
+               {
+                       ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, RAS_frac, RASv1p1)
+               },
+       };
+
+       return (has_cpuid_feature(&rasv1p1_caps[0], scope) ||
+               (has_cpuid_feature(&rasv1p1_caps[1], scope) &&
+                has_cpuid_feature(&rasv1p1_caps[2], scope)));
+}
 #endif /* CONFIG_ARM64_RAS_EXTN */
 
 #ifdef CONFIG_ARM64_PTR_AUTH
@@ -2653,6 +2671,12 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
                .cpu_enable = cpu_clear_disr,
                ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, RAS, IMP)
        },
+       {
+               .desc = "RASv1p1 Extension Support",
+               .capability = ARM64_HAS_RASV1P1_EXTN,
+               .type = ARM64_CPUCAP_SYSTEM_FEATURE,
+               .matches = has_rasv1p1,
+       },
 #endif /* CONFIG_ARM64_RAS_EXTN */
 #ifdef CONFIG_ARM64_AMU_EXTN
        {

diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
index 115161dd9a24d7de15fffd50225016ad704e39fd..eb7f1f5622a8fa555c9ff1507d246590d891a0cc 100644 (file)
--- a/arch/arm64/tools/cpucaps
+++ b/arch/arm64/tools/cpucaps
@@ -52,6 +52,7 @@ HAS_S1PIE
 HAS_S1POE
 HAS_SCTLR2
 HAS_RAS_EXTN
+HAS_RASV1P1_EXTN
 HAS_RNG
 HAS_SB
 HAS_STAGE2_FWB