arm64: dts: ti: k3-am62a: Add watchdog nodes

Add nodes for watchdogs:
- 5 in main domain
- 1 in MCU domain
- 1 in wakeup domain

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230418012717.1230882-3-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index 59d1199e43c94c2ed55d41a67034b96c34203943..e43e64451bc175a91e6766aa9991557251bb4ee1 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -697,6 +697,51 @@
                status = "disabled";
        };
 
+       main_rti0: watchdog@e000000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x00 0x0e000000 0x00 0x100>;
+               clocks = <&k3_clks 125 0>;
+               power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 125 0>;
+               assigned-clock-parents = <&k3_clks 125 2>;
+       };
+
+       main_rti1: watchdog@e010000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x00 0x0e010000 0x00 0x100>;
+               clocks = <&k3_clks 126 0>;
+               power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 126 0>;
+               assigned-clock-parents = <&k3_clks 126 2>;
+       };
+
+       main_rti2: watchdog@e020000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x00 0x0e020000 0x00 0x100>;
+               clocks = <&k3_clks 127 0>;
+               power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 127 0>;
+               assigned-clock-parents = <&k3_clks 127 2>;
+       };
+
+       main_rti3: watchdog@e030000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x00 0x0e030000 0x00 0x100>;
+               clocks = <&k3_clks 128 0>;
+               power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 128 0>;
+               assigned-clock-parents = <&k3_clks 128 2>;
+       };
+
+       main_rti4: watchdog@e040000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x00 0x0e040000 0x00 0x100>;
+               clocks = <&k3_clks 205 0>;
+               power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 205 0>;
+               assigned-clock-parents = <&k3_clks 205 2>;
+       };
+
        epwm0: pwm@23000000 {
                compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
                #pwm-cells = <3>;

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
index 50c94a55fe85b58dc8136c9b69af797018a1bfbc..04599762c2b7d28e21764e894d31bf0d00c8aede 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
@@ -132,4 +132,15 @@
                clock-names = "gpio";
                status = "disabled";
        };
+
+       mcu_rti0: watchdog@4880000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x00 0x04880000 0x00 0x100>;
+               clocks = <&k3_clks 131 0>;
+               power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 131 0>;
+               assigned-clock-parents = <&k3_clks 131 2>;
+               /* Tightly coupled to M4F */
+               status = "reserved";
+       };
 };

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
index 81d984414fd4a680945435e5101511aa5ab1e685..d848eb24b55227f4a7c3849f16096bd7a4338e06 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
@@ -51,4 +51,15 @@
                wakeup-source;
                status = "disabled";
        };
+
+       wkup_rti0: watchdog@2b000000 {
+               compatible = "ti,j7-rti-wdt";
+               reg = <0x00 0x2b000000 0x00 0x100>;
+               clocks = <&k3_clks 132 0>;
+               power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
+               assigned-clocks = <&k3_clks 132 0>;
+               assigned-clock-parents = <&k3_clks 132 2>;
+               /* Used by DM firmware */
+               status = "reserved";
+       };
 };