reg = mdiobb_cmd_addr(ctrl, phy, reg);
                mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg);
        } else
-               mdiobb_cmd(ctrl, MDIO_READ, phy, reg);
+               mdiobb_cmd(ctrl, ctrl->op_c22_read, phy, reg);
 
        ctrl->ops->set_mdio_dir(ctrl, 0);
 
                reg = mdiobb_cmd_addr(ctrl, phy, reg);
                mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg);
        } else
-               mdiobb_cmd(ctrl, MDIO_WRITE, phy, reg);
+               mdiobb_cmd(ctrl, ctrl->op_c22_write, phy, reg);
 
        /* send the turnaround (10) */
        mdiobb_send_bit(ctrl, 1);
        bus->read = mdiobb_read;
        bus->write = mdiobb_write;
        bus->priv = ctrl;
+       if (!ctrl->override_op_c22) {
+               ctrl->op_c22_read = MDIO_READ;
+               ctrl->op_c22_write = MDIO_WRITE;
+       }
 
        return bus;
 }
 
                new_bus->phy_ignore_ta_mask = pdata->phy_ignore_ta_mask;
        }
 
+       if (dev->of_node &&
+           of_device_is_compatible(dev->of_node, "microchip,mdio-smi0")) {
+               bitbang->ctrl.op_c22_read = 0;
+               bitbang->ctrl.op_c22_write = 0;
+               bitbang->ctrl.override_op_c22 = 1;
+       }
+
        dev_set_drvdata(dev, new_bus);
 
        return new_bus;
 
 static const struct of_device_id mdio_gpio_of_match[] = {
        { .compatible = "virtual,mdio-gpio", },
+       { .compatible = "microchip,mdio-smi0" },
        { /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, mdio_gpio_of_match);