arm64: dts: qcom: sa8775p: add QCrypto nodes

Add the QCE and Crypto BAM DMA nodes.

Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@quicinc.com>
Link: https://lore.kernel.org/r/20241017144500.3968797-3-quic_yrangana@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 47b5fb4d83a9920f3a8c6299d0228d8c531f2b4c..38aff68d583ea2da8f8c1e9958639ea0ffcdaf9e 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -2389,6 +2389,28 @@
                        clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
                };
 
+               cryptobam: dma-controller@1dc4000 {
+                       compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+                       reg = <0x0 0x01dc4000 0x0 0x28000>;
+                       interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       qcom,ee = <0>;
+                       qcom,controlled-remotely;
+                       iommus = <&apps_smmu 0x480 0x00>,
+                                <&apps_smmu 0x481 0x00>;
+               };
+
+               crypto: crypto@1dfa000 {
+                       compatible = "qcom,sa8775p-qce", "qcom,qce";
+                       reg = <0x0 0x01dfa000 0x0 0x6000>;
+                       dmas = <&cryptobam 4>, <&cryptobam 5>;
+                       dma-names = "rx", "tx";
+                       iommus = <&apps_smmu 0x480 0x00>,
+                                <&apps_smmu 0x481 0x00>;
+                       interconnects = <&aggre2_noc MASTER_CRYPTO_CORE0 0 &mc_virt SLAVE_EBI1 0>;
+                       interconnect-names = "memory";
+               };
+
                stm: stm@4002000 {
                        compatible = "arm,coresight-stm", "arm,primecell";
                        reg = <0x0 0x4002000 0x0 0x1000>,