static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev,
                              struct its_ite *ite, gpa_t gpa, int ite_esz)
 {
-       struct kvm *kvm = its->dev->kvm;
        u32 next_offset;
        u64 val;
 
               ((u64)ite->irq->intid << KVM_ITS_ITE_PINTID_SHIFT) |
                ite->collection->collection_id;
        val = cpu_to_le64(val);
-       return vgic_write_guest_lock(kvm, gpa, &val, ite_esz);
+
+       return vgic_its_write_entry_lock(its, gpa, val, ite_esz);
 }
 
 /**
 static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev,
                             gpa_t ptr, int dte_esz)
 {
-       struct kvm *kvm = its->dev->kvm;
        u64 val, itt_addr_field;
        u32 next_offset;
 
               (itt_addr_field << KVM_ITS_DTE_ITTADDR_SHIFT) |
                (dev->num_eventid_bits - 1));
        val = cpu_to_le64(val);
-       return vgic_write_guest_lock(kvm, ptr, &val, dte_esz);
+
+       return vgic_its_write_entry_lock(its, ptr, val, dte_esz);
 }
 
 /**
               ((u64)collection->target_addr << KVM_ITS_CTE_RDBASE_SHIFT) |
               collection->collection_id);
        val = cpu_to_le64(val);
-       return vgic_write_guest_lock(its->dev->kvm, gpa, &val, esz);
+
+       return vgic_its_write_entry_lock(its, gpa, val, esz);
 }
 
 /*
        u64 val;
        int ret;
 
-       BUG_ON(esz > sizeof(val));
-       ret = kvm_read_guest_lock(kvm, gpa, &val, esz);
+       ret = vgic_its_read_entry_lock(its, gpa, &val, esz);
        if (ret)
                return ret;
        val = le64_to_cpu(val);
        u64 baser = its->baser_coll_table;
        gpa_t gpa = GITS_BASER_ADDR_48_to_52(baser);
        struct its_collection *collection;
-       u64 val;
        size_t max_size, filled = 0;
        int ret, cte_esz = abi->cte_esz;
 
         * table is not fully filled, add a last dummy element
         * with valid bit unset
         */
-       val = 0;
-       BUG_ON(cte_esz > sizeof(val));
-       ret = vgic_write_guest_lock(its->dev->kvm, gpa, &val, cte_esz);
-       return ret;
+       return vgic_its_write_entry_lock(its, gpa, 0, cte_esz);
 }
 
 /*
 
        return ret;
 }
 
+static inline int vgic_its_read_entry_lock(struct vgic_its *its, gpa_t eaddr,
+                                          u64 *eval, unsigned long esize)
+{
+       struct kvm *kvm = its->dev->kvm;
+
+       if (KVM_BUG_ON(esize != sizeof(*eval), kvm))
+               return -EINVAL;
+
+       return kvm_read_guest_lock(kvm, eaddr, eval, esize);
+
+}
+
+static inline int vgic_its_write_entry_lock(struct vgic_its *its, gpa_t eaddr,
+                                           u64 eval, unsigned long esize)
+{
+       struct kvm *kvm = its->dev->kvm;
+
+       if (KVM_BUG_ON(esize != sizeof(eval), kvm))
+               return -EINVAL;
+
+       return vgic_write_guest_lock(kvm, eaddr, &eval, esize);
+}
+
 /*
  * This struct provides an intermediate representation of the fields contained
  * in the GICH_VMCR and ICH_VMCR registers, such that code exporting the GIC