]> www.infradead.org Git - users/dwmw2/qemu.git/commitdiff
target/hppa: Fix BE,L set of sr0
authorRichard Henderson <richard.henderson@linaro.org>
Wed, 20 Mar 2024 18:51:56 +0000 (08:51 -1000)
committerRichard Henderson <richard.henderson@linaro.org>
Wed, 27 Mar 2024 22:15:25 +0000 (12:15 -1000)
The return address comes from IA*Q_Next, and IASQ_Next
is always equal to IASQ_Back, not IASQ_Front.

Tested-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
target/hppa/translate.c

index 19594f917ee3920edd0452e997e9f0f0029d3235..1766a6300195eb7d06241d1671f1af10b77211cb 100644 (file)
@@ -3817,7 +3817,7 @@ static bool trans_be(DisasContext *ctx, arg_be *a)
     load_spr(ctx, new_spc, a->sp);
     if (a->l) {
         copy_iaoq_entry(ctx, cpu_gr[31], ctx->iaoq_n, ctx->iaoq_n_var);
-        tcg_gen_mov_i64(cpu_sr[0], cpu_iasq_f);
+        tcg_gen_mov_i64(cpu_sr[0], cpu_iasq_b);
     }
     if (a->n && use_nullify_skip(ctx)) {
         copy_iaoq_entry(ctx, cpu_iaoq_f, -1, tmp);