]> www.infradead.org Git - users/hch/misc.git/commitdiff
drm/amdgpu/pm: add workload profile pause helper
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 26 Mar 2025 14:26:25 +0000 (10:26 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 9 Apr 2025 14:53:11 +0000 (10:53 -0400)
To be used for display idle optimizations when
we want to pause non-default profiles.

Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 6dafb5d4c7cdfc8f994e789d050e29e0d5ca6efd)

drivers/gpu/drm/amd/include/kgd_pp_interface.h
drivers/gpu/drm/amd/pm/amdgpu_dpm.c
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h

index 2a9606118d89943fb29ad0a616e3d5665412c5f5..21dc956b5f35d41d6f796e511a3dc2e684eff8ac 100644 (file)
@@ -429,6 +429,7 @@ struct amd_pm_funcs {
        int (*set_pp_table)(void *handle, const char *buf, size_t size);
        void (*debugfs_print_current_performance_level)(void *handle, struct seq_file *m);
        int (*switch_power_profile)(void *handle, enum PP_SMC_POWER_PROFILE type, bool en);
+       int (*pause_power_profile)(void *handle, bool pause);
 /* export to amdgpu */
        struct amd_vce_state *(*get_vce_clock_state)(void *handle, u32 idx);
        int (*dispatch_tasks)(void *handle, enum amd_pp_task task_id,
index 81e9b443ca0adc3ec5016eddf2c3ad4fba9ad805..3533d43ed1e73db4ca3a30570bc74a47ae14539f 100644 (file)
@@ -349,6 +349,25 @@ int amdgpu_dpm_switch_power_profile(struct amdgpu_device *adev,
        return ret;
 }
 
+int amdgpu_dpm_pause_power_profile(struct amdgpu_device *adev,
+                                  bool pause)
+{
+       const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
+       int ret = 0;
+
+       if (amdgpu_sriov_vf(adev))
+               return 0;
+
+       if (pp_funcs && pp_funcs->pause_power_profile) {
+               mutex_lock(&adev->pm.mutex);
+               ret = pp_funcs->pause_power_profile(
+                       adev->powerplay.pp_handle, pause);
+               mutex_unlock(&adev->pm.mutex);
+       }
+
+       return ret;
+}
+
 int amdgpu_dpm_set_xgmi_pstate(struct amdgpu_device *adev,
                               uint32_t pstate)
 {
index f93d287dbf1376bf1257ea57bcdf7a25d4f26b29..4c0f7ad1481661e1050274ddf387e14a08d66d57 100644 (file)
@@ -410,6 +410,8 @@ int amdgpu_dpm_set_xgmi_pstate(struct amdgpu_device *adev,
 int amdgpu_dpm_switch_power_profile(struct amdgpu_device *adev,
                                    enum PP_SMC_POWER_PROFILE type,
                                    bool en);
+int amdgpu_dpm_pause_power_profile(struct amdgpu_device *adev,
+                                  bool pause);
 
 int amdgpu_dpm_baco_reset(struct amdgpu_device *adev);