phy: airoha: adjust initialization delay in airoha_pcie_phy_init()

Align phy-pcie initialization delay to the vendor sdk in
airoha_pcie_phy_init routine and allow the hw to complete required
configuration before proceeding

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/8af6f27857619f1e0dd227f08b8584ae8fb22fb2.1722959625.git.lorenzo@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/phy-airoha-pcie.c b/drivers/phy/phy-airoha-pcie.c
index bd3edaa986c8bd21079f94fe2adcf5964b009f34..1e410eb410580c44c02ba9bae96a2e19fc24bc8c 100644 (file)
--- a/drivers/phy/phy-airoha-pcie.c
+++ b/drivers/phy/phy-airoha-pcie.c
@@ -18,6 +18,9 @@
 #define LEQ_LEN_CTRL_MAX_VAL   7
 #define FREQ_LOCK_MAX_ATTEMPT  10
 
+/* PCIe-PHY initialization time in ms needed by the hw to complete */
+#define PHY_HW_INIT_TIME_MS    30
+
 enum airoha_pcie_port_gen {
        PCIE_PORT_GEN1 = 1,
        PCIE_PORT_GEN2,
@@ -1181,7 +1184,8 @@ static int airoha_pcie_phy_init(struct phy *phy)
        airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_SS_DA_XPON_PWDB0,
                                 PCIE_DA_XPON_CDR_PR_PWDB);
 
-       usleep_range(100, 200);
+       /* Wait for the PCIe PHY to complete initialization before returning */
+       msleep(PHY_HW_INIT_TIME_MS);
 
        return 0;
 }