obj_priv = to_intel_bo(ring->gem_object);
 
        /* Stop the ring if it's running. */
-       I915_WRITE(ring->regs.ctl, 0);
+       I915_WRITE_CTL(ring, 0);
        I915_WRITE_HEAD(ring, 0);
        ring->set_tail(dev, ring, 0);
 
                DRM_ERROR("%s head not reset to zero "
                                "ctl %08x head %08x tail %08x start %08x\n",
                                ring->name,
-                               I915_READ(ring->regs.ctl),
+                               I915_READ_CTL(ring),
                                I915_READ_HEAD(ring),
                                I915_READ_TAIL(ring),
                                I915_READ_START(ring));
                DRM_ERROR("%s head forced to zero "
                                "ctl %08x head %08x tail %08x start %08x\n",
                                ring->name,
-                               I915_READ(ring->regs.ctl),
+                               I915_READ_CTL(ring),
                                I915_READ_HEAD(ring),
                                I915_READ_TAIL(ring),
                                I915_READ_START(ring));
        }
 
-       I915_WRITE(ring->regs.ctl,
+       I915_WRITE_CTL(ring,
                        ((ring->gem_object->size - PAGE_SIZE) & RING_NR_PAGES)
                        | RING_NO_REPORT | RING_VALID);
 
                DRM_ERROR("%s initialization failed "
                                "ctl %08x head %08x tail %08x start %08x\n",
                                ring->name,
-                               I915_READ(ring->regs.ctl),
+                               I915_READ_CTL(ring),
                                I915_READ_HEAD(ring),
                                I915_READ_TAIL(ring),
                                I915_READ_START(ring));
 static const struct intel_ring_buffer render_ring = {
        .name                   = "render ring",
        .id                     = RING_RENDER,
-       .regs                   = {
-               .ctl = PRB0_CTL,
-       },
        .mmio_base              = RENDER_RING_BASE,
        .size                   = 32 * PAGE_SIZE,
        .alignment              = PAGE_SIZE,
 static const struct intel_ring_buffer bsd_ring = {
        .name                   = "bsd ring",
        .id                     = RING_BSD,
-       .regs                   = {
-               .ctl = BSD_RING_CTL,
-       },
        .mmio_base              = BSD_RING_BASE,
        .size                   = 32 * PAGE_SIZE,
        .alignment              = PAGE_SIZE,
 static const struct intel_ring_buffer gen6_bsd_ring = {
        .name                   = "gen6 bsd ring",
        .id                     = RING_BSD,
-       .regs                   = {
-               .ctl    = GEN6_BSD_RING_CTL,
-       },
        .mmio_base              = GEN6_BSD_RING_BASE,
        .size                   = 32 * PAGE_SIZE,
        .alignment              = PAGE_SIZE,
 
 #define I915_WRITE_START(ring, val) I915_WRITE(RING_START(ring->mmio_base), val)
 #define I915_READ_HEAD(ring) I915_READ(RING_HEAD(ring->mmio_base))
 #define I915_WRITE_HEAD(ring, val) I915_WRITE(RING_HEAD(ring->mmio_base), val)
+#define I915_READ_CTL(ring) I915_READ(RING_CTL(ring->mmio_base))
+#define I915_WRITE_CTL(ring, val) I915_WRITE(RING_CTL(ring->mmio_base), val)
 
 struct drm_i915_gem_execbuffer2;
 struct  intel_ring_buffer {
                RING_RENDER = 0x1,
                RING_BSD = 0x2,
        } id;
-       struct          ring_regs {
-                       u32 ctl;
-       } regs;
        u32             mmio_base;
        unsigned long   size;
        unsigned int    alignment;