goto out_master;
        }
 
-       spicc->core = devm_clk_get(&pdev->dev, "core");
+       spicc->core = devm_clk_get_enabled(&pdev->dev, "core");
        if (IS_ERR(spicc->core)) {
                dev_err(&pdev->dev, "core clock request failed\n");
                ret = PTR_ERR(spicc->core);
        }
 
        if (spicc->data->has_pclk) {
-               spicc->pclk = devm_clk_get(&pdev->dev, "pclk");
+               spicc->pclk = devm_clk_get_enabled(&pdev->dev, "pclk");
                if (IS_ERR(spicc->pclk)) {
                        dev_err(&pdev->dev, "pclk clock request failed\n");
                        ret = PTR_ERR(spicc->pclk);
                }
        }
 
-       ret = clk_prepare_enable(spicc->core);
-       if (ret) {
-               dev_err(&pdev->dev, "core clock enable failed\n");
-               goto out_master;
-       }
-
-       ret = clk_prepare_enable(spicc->pclk);
-       if (ret) {
-               dev_err(&pdev->dev, "pclk clock enable failed\n");
-               goto out_core_clk;
-       }
-
        spicc->pinctrl = devm_pinctrl_get(&pdev->dev);
        if (IS_ERR(spicc->pinctrl)) {
                ret = PTR_ERR(spicc->pinctrl);
-               goto out_clk;
+               goto out_master;
        }
 
        device_reset_optional(&pdev->dev);
        ret = meson_spicc_pow2_clk_init(spicc);
        if (ret) {
                dev_err(&pdev->dev, "pow2 clock registration failed\n");
-               goto out_clk;
+               goto out_master;
        }
 
        if (spicc->data->has_enhance_clk_div) {
                ret = meson_spicc_enh_clk_init(spicc);
                if (ret) {
                        dev_err(&pdev->dev, "clock registration failed\n");
-                       goto out_clk;
+                       goto out_master;
                }
        }
 
        ret = devm_spi_register_master(&pdev->dev, master);
        if (ret) {
                dev_err(&pdev->dev, "spi master registration failed\n");
-               goto out_clk;
+               goto out_master;
        }
 
        return 0;
 
-out_clk:
-       clk_disable_unprepare(spicc->pclk);
-
-out_core_clk:
-       clk_disable_unprepare(spicc->core);
-
 out_master:
        spi_master_put(master);
 
        /* Disable SPI */
        writel(0, spicc->base + SPICC_CONREG);
 
-       clk_disable_unprepare(spicc->core);
-       clk_disable_unprepare(spicc->pclk);
-
        spi_master_put(spicc->master);
 }