]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
x86/speculation: Simplify the CPU bug detection logic
authorDominik Brodowski <linux@dominikbrodowski.net>
Thu, 28 Mar 2019 17:57:11 +0000 (13:57 -0400)
committerMihai Carabas <mihai.carabas@oracle.com>
Mon, 22 Apr 2019 18:16:16 +0000 (21:16 +0300)
commit 8ecc4979b1bd9c94168e6fc92960033b7a951336 upstream

Only CPUs which speculate can speculate. Therefore, it seems prudent
to test for cpu_no_speculation first and only then determine whether
a specific speculating CPU is susceptible to store bypass speculation.
This is underlined by all CPUs currently listed in cpu_no_speculation
were present in cpu_no_spec_store_bypass as well.

Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: bp@suse.de
Cc: konrad.wilk@oracle.com
Link: https://lkml.kernel.org/r/20180522090539.GA24668@light.dominikbrodowski.net
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
(cherry picked from commit d24249216c7ddfc290843d9708e33adec921700b)

Orabug: 29526900
CVE: CVE-2018-12126
CVE: CVE-2018-12130
CVE: CVE-2018-12127

Signed-off-by: Kanth Ghatraju <kanth.ghatraju@oracle.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
arch/x86/kernel/cpu/common.c

index ad96345b64a73df2a9265dd244ac42f04b5324f6..dbb6d833e58842b7917a4a14aeff10b0cbaf55a1 100644 (file)
@@ -819,28 +819,19 @@ static const struct x86_cpu_id cpu_no_meltdown[] = {
        {}
 };
 
-
+/* Only list CPUs which speculate but are non susceptible to SSB */
 static const struct x86_cpu_id cpu_no_spec_store_bypass[] = {
-       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_ATOM_PINEVIEW        },
-       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_ATOM_LINCROFT        },
-       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_ATOM_PENWELL         },
-       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_ATOM_CLOVERVIEW      },
-       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_ATOM_CEDARVIEW       },
-       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_ATOM_SILVERMONT1     },
-       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_ATOM_AIRMONT         },
-       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_ATOM_SILVERMONT2     },
-       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_ATOM_MERRIFIELD      },
-       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_CORE_YONAH           },
-       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_XEON_PHI_KNL         },
-       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_XEON_PHI_KNM         },
-       { X86_VENDOR_CENTAUR,   5,                                      },
-       { X86_VENDOR_INTEL,     5,                                      },
-       { X86_VENDOR_NSC,       5,                                      },
+       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_ATOM_SILVERMONT1     },
+       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_ATOM_AIRMONT         },
+       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_ATOM_SILVERMONT2     },
+       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_ATOM_MERRIFIELD      },
+       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_CORE_YONAH           },
+       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_XEON_PHI_KNL         },
+       { X86_VENDOR_INTEL,     6,      INTEL_FAM6_XEON_PHI_KNM         },
        { X86_VENDOR_AMD,       0x12,                                   },
        { X86_VENDOR_AMD,       0x11,                                   },
        { X86_VENDOR_AMD,       0x10,                                   },
        { X86_VENDOR_AMD,       0xf,                                    },
-       { X86_VENDOR_ANY,       4,                                      },
        {}
 };
 
@@ -863,6 +854,12 @@ void cpu_set_bug_bits(struct cpuinfo_x86 *c)
 {
        u64 ia32_cap = 0;
 
+       if (x86_match_cpu(cpu_no_speculation))
+               return;
+
+       setup_force_cpu_bug(X86_BUG_SPECTRE_V1);
+       setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
+
        if (cpu_has(c, X86_FEATURE_IA32_ARCH_CAPS))
                rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
 
@@ -870,12 +867,6 @@ void cpu_set_bug_bits(struct cpuinfo_x86 *c)
           !(ia32_cap & ARCH_CAP_SSB_NO))
                setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS);
 
-       if (x86_match_cpu(cpu_no_speculation))
-               return;
-
-       setup_force_cpu_bug(X86_BUG_SPECTRE_V1);
-       setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
-
        if (x86_match_cpu(cpu_no_meltdown))
                return;