/**
  * struct st_lsm6dsx_settings - ST IMU sensor settings
  * @wai: Sensor WhoAmI default value.
- * @int1_addr: Control Register address for INT1
- * @int2_addr: Control Register address for INT2
  * @reset_addr: register address for reset/reboot
  * @max_fifo_size: Sensor max fifo length in FIFO words.
  * @id: List of hw id/device name supported by the driver configuration.
  * @channels: IIO channels supported by the device.
+ * @irq_config: interrupts related registers.
  * @odr_table: Hw sensors odr table (Hz + val).
  * @fs_table: Hw sensors gain table (gain + val).
  * @decimator: List of decimator register info (addr + mask).
  * @batch: List of FIFO batching register info (addr + mask).
- * @lir: Latched interrupt register info (addr + mask).
- * @clear_on_read: Clear on read register info (addr + mask).
  * @fifo_ops: Sensor hw FIFO parameters.
  * @ts_settings: Hw timer related settings.
  * @shub_settings: i2c controller related settings.
  */
 struct st_lsm6dsx_settings {
        u8 wai;
-       u8 int1_addr;
-       u8 int2_addr;
-       u8 int1_func_addr;
-       u8 int2_func_addr;
-       u8 int_func_mask;
        u8 reset_addr;
        u16 max_fifo_size;
        struct {
                const struct iio_chan_spec *chan;
                int len;
        } channels[2];
+       struct {
+               struct st_lsm6dsx_reg irq1;
+               struct st_lsm6dsx_reg irq2;
+               struct st_lsm6dsx_reg irq1_func;
+               struct st_lsm6dsx_reg irq2_func;
+               struct st_lsm6dsx_reg lir;
+               struct st_lsm6dsx_reg clear_on_read;
+       } irq_config;
        struct st_lsm6dsx_odr_table_entry odr_table[2];
        struct st_lsm6dsx_fs_table_entry fs_table[2];
        struct st_lsm6dsx_reg decimator[ST_LSM6DSX_MAX_ID];
        struct st_lsm6dsx_reg batch[ST_LSM6DSX_MAX_ID];
-       struct st_lsm6dsx_reg lir;
-       struct st_lsm6dsx_reg clear_on_read;
        struct st_lsm6dsx_fifo_ops fifo_ops;
        struct st_lsm6dsx_hw_ts_settings ts_settings;
        struct st_lsm6dsx_shub_settings shub_settings;
        u8 ts_sip;
        u8 sip;
 
+       const struct st_lsm6dsx_reg *irq_routing;
        u8 event_threshold;
        u8 enable_event;
-       struct st_lsm6dsx_reg irq_routing;
 
        u8 *buff;
 
 
 
 #include "st_lsm6dsx.h"
 
-#define ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK       BIT(3)
 #define ST_LSM6DSX_REG_WHOAMI_ADDR             0x0f
 #define ST_LSM6DSX_REG_RESET_MASK              BIT(0)
 #define ST_LSM6DSX_REG_BOOT_MASK               BIT(7)
 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
        {
                .wai = 0x68,
-               .int1_addr = 0x0c,
-               .int2_addr = 0x0d,
                .reset_addr = 0x22,
                .max_fifo_size = 32,
                .id = {
                                .fs_len = 3,
                        },
                },
+               .irq_config = {
+                       .irq1 = {
+                               .addr = 0x0c,
+                               .mask = BIT(3),
+                       },
+                       .irq2 = {
+                               .addr = 0x0d,
+                               .mask = BIT(3),
+                       },
+               },
        },
        {
                .wai = 0x69,
-               .int1_addr = 0x0d,
-               .int2_addr = 0x0e,
-               .int1_func_addr = 0x5e,
-               .int2_func_addr = 0x5f,
-               .int_func_mask = BIT(5),
                .reset_addr = 0x12,
                .max_fifo_size = 1365,
                .id = {
                                .fs_len = 4,
                        },
                },
+               .irq_config = {
+                       .irq1 = {
+                               .addr = 0x0d,
+                               .mask = BIT(3),
+                       },
+                       .irq2 = {
+                               .addr = 0x0e,
+                               .mask = BIT(3),
+                       },
+                       .lir = {
+                               .addr = 0x58,
+                               .mask = BIT(0),
+                       },
+                       .irq1_func = {
+                               .addr = 0x5e,
+                               .mask = BIT(5),
+                       },
+                       .irq2_func = {
+                               .addr = 0x5f,
+                               .mask = BIT(5),
+                       },
+               },
                .decimator = {
                        [ST_LSM6DSX_ID_ACC] = {
                                .addr = 0x08,
                                .mask = GENMASK(5, 3),
                        },
                },
-               .lir = {
-                       .addr = 0x58,
-                       .mask = BIT(0),
-               },
                .fifo_ops = {
                        .update_fifo = st_lsm6dsx_update_fifo,
                        .read_fifo = st_lsm6dsx_read_fifo,
        },
        {
                .wai = 0x69,
-               .int1_addr = 0x0d,
-               .int2_addr = 0x0e,
-               .int1_func_addr = 0x5e,
-               .int2_func_addr = 0x5f,
-               .int_func_mask = BIT(5),
                .reset_addr = 0x12,
                .max_fifo_size = 682,
                .id = {
                                .fs_len = 4,
                        },
                },
+               .irq_config = {
+                       .irq1 = {
+                               .addr = 0x0d,
+                               .mask = BIT(3),
+                       },
+                       .irq2 = {
+                               .addr = 0x0e,
+                               .mask = BIT(3),
+                       },
+                       .lir = {
+                               .addr = 0x58,
+                               .mask = BIT(0),
+                       },
+                       .irq1_func = {
+                               .addr = 0x5e,
+                               .mask = BIT(5),
+                       },
+                       .irq2_func = {
+                               .addr = 0x5f,
+                               .mask = BIT(5),
+                       },
+               },
                .decimator = {
                        [ST_LSM6DSX_ID_ACC] = {
                                .addr = 0x08,
                                .mask = GENMASK(5, 3),
                        },
                },
-               .lir = {
-                       .addr = 0x58,
-                       .mask = BIT(0),
-               },
                .fifo_ops = {
                        .update_fifo = st_lsm6dsx_update_fifo,
                        .read_fifo = st_lsm6dsx_read_fifo,
        },
        {
                .wai = 0x6a,
-               .int1_addr = 0x0d,
-               .int2_addr = 0x0e,
-               .int1_func_addr = 0x5e,
-               .int2_func_addr = 0x5f,
-               .int_func_mask = BIT(5),
                .reset_addr = 0x12,
                .max_fifo_size = 682,
                .id = {
                                .fs_len = 4,
                        },
                },
+               .irq_config = {
+                       .irq1 = {
+                               .addr = 0x0d,
+                               .mask = BIT(3),
+                       },
+                       .irq2 = {
+                               .addr = 0x0e,
+                               .mask = BIT(3),
+                       },
+                       .lir = {
+                               .addr = 0x58,
+                               .mask = BIT(0),
+                       },
+                       .irq1_func = {
+                               .addr = 0x5e,
+                               .mask = BIT(5),
+                       },
+                       .irq2_func = {
+                               .addr = 0x5f,
+                               .mask = BIT(5),
+                       },
+               },
                .decimator = {
                        [ST_LSM6DSX_ID_ACC] = {
                                .addr = 0x08,
                                .mask = GENMASK(5, 3),
                        },
                },
-               .lir = {
-                       .addr = 0x58,
-                       .mask = BIT(0),
-               },
                .fifo_ops = {
                        .update_fifo = st_lsm6dsx_update_fifo,
                        .read_fifo = st_lsm6dsx_read_fifo,
        },
        {
                .wai = 0x6c,
-               .int1_addr = 0x0d,
-               .int2_addr = 0x0e,
                .reset_addr = 0x12,
                .max_fifo_size = 512,
                .id = {
                                .fs_len = 4,
                        },
                },
+               .irq_config = {
+                       .irq1 = {
+                               .addr = 0x0d,
+                               .mask = BIT(3),
+                       },
+                       .irq2 = {
+                               .addr = 0x0e,
+                               .mask = BIT(3),
+                       },
+                       .lir = {
+                               .addr = 0x56,
+                               .mask = BIT(0),
+                       },
+                       .clear_on_read = {
+                               .addr = 0x56,
+                               .mask = BIT(6),
+                       },
+               },
                .batch = {
                        [ST_LSM6DSX_ID_ACC] = {
                                .addr = 0x09,
                                .mask = GENMASK(7, 4),
                        },
                },
-               .lir = {
-                       .addr = 0x56,
-                       .mask = BIT(0),
-               },
-               .clear_on_read = {
-                       .addr = 0x56,
-                       .mask = BIT(6),
-               },
                .fifo_ops = {
                        .update_fifo = st_lsm6dsx_update_fifo,
                        .read_fifo = st_lsm6dsx_read_tagged_fifo,
        },
        {
                .wai = 0x6b,
-               .int1_addr = 0x0d,
-               .int2_addr = 0x0e,
-               .int1_func_addr = 0x5e,
-               .int2_func_addr = 0x5f,
-               .int_func_mask = BIT(5),
                .reset_addr = 0x12,
                .max_fifo_size = 512,
                .id = {
                                .fs_len = 4,
                        },
                },
+               .irq_config = {
+                       .irq1 = {
+                               .addr = 0x0d,
+                               .mask = BIT(3),
+                       },
+                       .irq2 = {
+                               .addr = 0x0e,
+                               .mask = BIT(3),
+                       },
+                       .lir = {
+                               .addr = 0x56,
+                               .mask = BIT(0),
+                       },
+                       .clear_on_read = {
+                               .addr = 0x56,
+                               .mask = BIT(6),
+                       },
+                       .irq1_func = {
+                               .addr = 0x5e,
+                               .mask = BIT(5),
+                       },
+                       .irq2_func = {
+                               .addr = 0x5f,
+                               .mask = BIT(5),
+                       },
+               },
                .batch = {
                        [ST_LSM6DSX_ID_ACC] = {
                                .addr = 0x09,
                                .mask = GENMASK(7, 4),
                        },
                },
-               .lir = {
-                       .addr = 0x56,
-                       .mask = BIT(0),
-               },
-               .clear_on_read = {
-                       .addr = 0x56,
-                       .mask = BIT(6),
-               },
                .fifo_ops = {
                        .update_fifo = st_lsm6dsx_update_fifo,
                        .read_fifo = st_lsm6dsx_read_tagged_fifo,
        },
        {
                .wai = 0x6b,
-               .int1_addr = 0x0d,
-               .int2_addr = 0x0e,
-               .int1_func_addr = 0x5e,
-               .int2_func_addr = 0x5f,
-               .int_func_mask = BIT(5),
                .reset_addr = 0x12,
                .max_fifo_size = 512,
                .id = {
                                .fs_len = 4,
                        },
                },
+               .irq_config = {
+                       .irq1 = {
+                               .addr = 0x0d,
+                               .mask = BIT(3),
+                       },
+                       .irq2 = {
+                               .addr = 0x0e,
+                               .mask = BIT(3),
+                       },
+                       .lir = {
+                               .addr = 0x56,
+                               .mask = BIT(0),
+                       },
+                       .clear_on_read = {
+                               .addr = 0x56,
+                               .mask = BIT(6),
+                       },
+                       .irq1_func = {
+                               .addr = 0x5e,
+                               .mask = BIT(5),
+                       },
+                       .irq2_func = {
+                               .addr = 0x5f,
+                               .mask = BIT(5),
+                       },
+               },
                .batch = {
                        [ST_LSM6DSX_ID_ACC] = {
                                .addr = 0x09,
                                .mask = GENMASK(7, 4),
                        },
                },
-               .lir = {
-                       .addr = 0x56,
-                       .mask = BIT(0),
-               },
-               .clear_on_read = {
-                       .addr = 0x56,
-                       .mask = BIT(6),
-               },
                .fifo_ops = {
                        .update_fifo = st_lsm6dsx_update_fifo,
                        .read_fifo = st_lsm6dsx_read_tagged_fifo,
        int err;
        u8 enable = 0;
 
-       if (!hw->settings->int1_func_addr)
+       if (!hw->settings->irq_config.irq1_func.addr)
                return -ENOTSUPP;
 
        enable = state ? hw->settings->event_settings.enable_reg.mask : 0;
        if (err < 0)
                return err;
 
-       enable = state ? hw->irq_routing.mask : 0;
+       enable = state ? hw->irq_routing->mask : 0;
 
        /* Enable wakeup interrupt */
-       return regmap_update_bits(hw->regmap, hw->irq_routing.addr,
-                                 hw->irq_routing.mask,
-                                 enable);
+       return regmap_update_bits(hw->regmap, hw->irq_routing->addr,
+                                 hw->irq_routing->mask, enable);
 }
 
 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
        return of_property_read_u32(np, "st,drdy-int-pin", drdy_pin);
 }
 
-static int st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, u8 *drdy_reg)
+static int
+st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
+                       const struct st_lsm6dsx_reg **drdy_reg)
 {
        int err = 0, drdy_pin;
 
 
        switch (drdy_pin) {
        case 1:
-               *drdy_reg = hw->settings->int1_addr;
-               hw->irq_routing.addr = hw->settings->int1_func_addr;
-               hw->irq_routing.mask = hw->settings->int_func_mask;
+               hw->irq_routing = &hw->settings->irq_config.irq1_func;
+               *drdy_reg = &hw->settings->irq_config.irq1;
                break;
        case 2:
-               *drdy_reg = hw->settings->int2_addr;
-               hw->irq_routing.addr = hw->settings->int2_func_addr;
-               hw->irq_routing.mask = hw->settings->int_func_mask;
+               hw->irq_routing = &hw->settings->irq_config.irq2_func;
+               *drdy_reg = &hw->settings->irq_config.irq2;
                break;
        default:
                dev_err(hw->dev, "unsupported data ready pin\n");
 
 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
 {
-       u8 drdy_int_reg;
+       const struct st_lsm6dsx_reg *reg;
        int err;
 
        /* device sw reset */
                return err;
 
        /* enable FIFO watermak interrupt */
-       err = st_lsm6dsx_get_drdy_reg(hw, &drdy_int_reg);
+       err = st_lsm6dsx_get_drdy_reg(hw, ®);
        if (err < 0)
                return err;
 
-       err = regmap_update_bits(hw->regmap, drdy_int_reg,
-                                ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK,
-                                FIELD_PREP(ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK,
-                                           1));
+       err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
+                                ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
        if (err < 0)
                return err;
 
        /* enable Latched interrupts for device events */
-       if (hw->settings->lir.addr) {
-               unsigned int data;
-
-               data = ST_LSM6DSX_SHIFT_VAL(1, hw->settings->lir.mask);
-               err = regmap_update_bits(hw->regmap, hw->settings->lir.addr,
-                                        hw->settings->lir.mask, data);
+       if (hw->settings->irq_config.lir.addr) {
+               reg = &hw->settings->irq_config.lir;
+               err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
+                                        ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
                if (err < 0)
                        return err;
 
                /* enable clear on read for latched interrupts */
-               if (hw->settings->clear_on_read.addr) {
-                       data = ST_LSM6DSX_SHIFT_VAL(1,
-                                       hw->settings->clear_on_read.mask);
+               if (hw->settings->irq_config.clear_on_read.addr) {
+                       reg = &hw->settings->irq_config.clear_on_read;
                        err = regmap_update_bits(hw->regmap,
-                                       hw->settings->clear_on_read.addr,
-                                       hw->settings->clear_on_read.mask,
-                                       data);
+                                       reg->addr, reg->mask,
+                                       ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
                        if (err < 0)
                                return err;
                }