PLATFORM(BATTLEMAGE),
 };
 
+static const struct platform_desc ptl_desc = {
+       PLATFORM(PANTHERLAKE),
+};
+
 __diag_pop();
 
 /*
        INTEL_MTL_IDS(INTEL_DISPLAY_DEVICE, &mtl_desc),
        INTEL_LNL_IDS(INTEL_DISPLAY_DEVICE, &lnl_desc),
        INTEL_BMG_IDS(INTEL_DISPLAY_DEVICE, &bmg_desc),
+       INTEL_PTL_IDS(INTEL_DISPLAY_DEVICE, &ptl_desc),
 };
 
 static const struct {
        { 14,  0, &xe_lpdp_display },
        { 14,  1, &xe2_hpd_display },
        { 20,  0, &xe2_lpd_display },
+       { 30,  0, &xe2_lpd_display },
 };
 
 static const struct intel_display_device_info *
 
        INTEL_DISPLAY_LUNARLAKE,
        /* Display ver 14.1 (based on GMD ID) */
        INTEL_DISPLAY_BATTLEMAGE,
+       /* Display ver 30 (based on GMD ID) */
+       INTEL_DISPLAY_PANTHERLAKE,
 };
 
 enum intel_display_subplatform {
 
        MACRO__(0xE20D, ## __VA_ARGS__), \
        MACRO__(0xE212, ## __VA_ARGS__)
 
+/* PTL */
+#define INTEL_PTL_IDS(MACRO__, ...) \
+       MACRO__(0xB080, ## __VA_ARGS__), \
+       MACRO__(0xB081, ## __VA_ARGS__), \
+       MACRO__(0xB082, ## __VA_ARGS__), \
+       MACRO__(0xB090, ## __VA_ARGS__), \
+       MACRO__(0xB091, ## __VA_ARGS__), \
+       MACRO__(0xB092, ## __VA_ARGS__), \
+       MACRO__(0xB0A0, ## __VA_ARGS__), \
+       MACRO__(0xB0A1, ## __VA_ARGS__), \
+       MACRO__(0xB0A2, ## __VA_ARGS__)
+
 #endif /* _I915_PCIIDS_H */