F: hw/loongarch/
F: include/hw/loongarch/virt.h
F: include/hw/intc/loongarch_*.h
+F: include/hw/intc/loongson_ipi_common.h
F: include/hw/intc/loongson_ipi.h
F: hw/intc/loongarch_*.c
+F: hw/intc/loongson_ipi_common.c
F: hw/intc/loongson_ipi.c
F: include/hw/pci-host/ls7a.h
F: hw/rtc/ls7a_rtc.c
M: Huacai Chen <chenhuacai@kernel.org>
R: Jiaxun Yang <jiaxun.yang@flygoat.com>
S: Maintained
+F: hw/intc/loongson_ipi_common.c
F: hw/intc/loongson_ipi.c
F: hw/intc/loongson_liointc.c
F: hw/mips/loongson3_bootp.c
F: hw/mips/loongson3_bootp.h
F: hw/mips/loongson3_virt.c
+F: include/hw/intc/loongson_ipi_common.h
F: include/hw/intc/loongson_ipi.h
F: include/hw/intc/loongson_liointc.h
F: tests/avocado/machine_mips_loongson3v.py
config M68K_IRQC
bool
+config LOONGSON_IPI_COMMON
+ bool
+
config LOONGSON_IPI
bool
+ select LOONGSON_IPI_COMMON
config LOONGARCH_PCH_PIC
bool
static void loongson_ipi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ LoongsonIPIClass *lic = LOONGSON_IPI_CLASS(klass);
- dc->realize = loongson_ipi_realize;
- dc->unrealize = loongson_ipi_unrealize;
+ device_class_set_parent_realize(dc, loongson_ipi_realize,
+ &lic->parent_realize);
+ device_class_set_parent_unrealize(dc, loongson_ipi_unrealize,
+ &lic->parent_unrealize);
device_class_set_props(dc, ipi_properties);
dc->vmsd = &vmstate_loongson_ipi;
}
static const TypeInfo loongson_ipi_types[] = {
{
.name = TYPE_LOONGSON_IPI,
- .parent = TYPE_SYS_BUS_DEVICE,
+ .parent = TYPE_LOONGSON_IPI_COMMON,
.instance_size = sizeof(LoongsonIPIState),
+ .class_size = sizeof(LoongsonIPIClass),
.class_init = loongson_ipi_class_init,
}
};
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Loongson IPI interrupt common support
+ *
+ * Copyright (C) 2021 Loongson Technology Corporation Limited
+ */
+
+#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "hw/intc/loongson_ipi_common.h"
+
+static const TypeInfo loongarch_ipi_common_types[] = {
+ {
+ .name = TYPE_LOONGSON_IPI_COMMON,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(LoongsonIPICommonState),
+ .class_size = sizeof(LoongsonIPICommonClass),
+ .abstract = true,
+ }
+};
+
+DEFINE_TYPES(loongarch_ipi_common_types)
specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'],
if_true: files('spapr_xive_kvm.c'))
specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c'))
+specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c'))
specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c'))
specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c'))
specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c'))
#ifndef HW_LOONGSON_IPI_H
#define HW_LOONGSON_IPI_H
+#include "qom/object.h"
+#include "hw/intc/loongson_ipi_common.h"
#include "hw/sysbus.h"
/* Mainy used by iocsr read and write */
#define IPI_MBX_NUM 4
#define TYPE_LOONGSON_IPI "loongson_ipi"
-OBJECT_DECLARE_SIMPLE_TYPE(LoongsonIPIState, LOONGSON_IPI)
+OBJECT_DECLARE_TYPE(LoongsonIPIState, LoongsonIPIClass, LOONGSON_IPI)
typedef struct IPICore {
LoongsonIPIState *ipi;
qemu_irq irq;
} IPICore;
+struct LoongsonIPIClass {
+ LoongsonIPICommonClass parent_class;
+
+ DeviceRealize parent_realize;
+ DeviceUnrealize parent_unrealize;
+};
+
struct LoongsonIPIState {
- SysBusDevice parent_obj;
+ LoongsonIPICommonState parent_obj;
+
MemoryRegion ipi_iocsr_mem;
MemoryRegion ipi64_iocsr_mem;
uint32_t num_cpu;
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Loongson ipi interrupt header files
+ *
+ * Copyright (C) 2021 Loongson Technology Corporation Limited
+ */
+
+#ifndef HW_LOONGSON_IPI_COMMON_H
+#define HW_LOONGSON_IPI_COMMON_H
+
+#include "qom/object.h"
+#include "hw/sysbus.h"
+
+#define TYPE_LOONGSON_IPI_COMMON "loongson_ipi_common"
+OBJECT_DECLARE_TYPE(LoongsonIPICommonState,
+ LoongsonIPICommonClass, LOONGSON_IPI_COMMON)
+
+struct LoongsonIPICommonState {
+ SysBusDevice parent_obj;
+};
+
+struct LoongsonIPICommonClass {
+ SysBusDeviceClass parent_class;
+};
+
+#endif