drm/xe/hwmon: Expose card power and energy attributes of BMG

In BMG there are separate registers for card/platform power and
energy.
These are exposed through channel 0 i.e power_1/energy1_xxx.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com>
Link: https://lore.kernel.org/r/20240523144351.4040131-3-balasubramani.vivekanandan@intel.com
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240529050758.442056-3-balasubramani.vivekanandan@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
index beba16d592fc6140a7f223a268a8b6f4f51191ec..0b0b49d850aef43be5cc0534a502a0efc7b8a5d2 100644 (file)
--- a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
@@ -22,5 +22,7 @@
 #define BMG_PACKAGE_POWER_SKU_UNIT             XE_REG(0x1380dc)
 #define BMG_PACKAGE_ENERGY_STATUS              XE_REG(0x138120)
 #define BMG_PACKAGE_RAPL_LIMIT                 XE_REG(0x138440)
+#define BMG_PLATFORM_ENERGY_STATUS             XE_REG(0x138458)
+#define BMG_PLATFORM_POWER_LIMIT               XE_REG(0x138460)
 
 #endif /* _XE_PCODE_REGS_H_ */

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 8daa070d7b1a04ed0605079c3cbfcf9c0656be5e..222c651ee1f85eb792f9138756001badaf8fbb18 100644 (file)
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -86,12 +86,16 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
 
        switch (hwmon_reg) {
        case REG_PKG_RAPL_LIMIT:
-               if (xe->info.platform == XE_BATTLEMAGE && channel == CHANNEL_PKG)
-                       return BMG_PACKAGE_RAPL_LIMIT;
-               else if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG)
+               if (xe->info.platform == XE_BATTLEMAGE) {
+                       if (channel == CHANNEL_PKG)
+                               return BMG_PACKAGE_RAPL_LIMIT;
+                       else
+                               return BMG_PLATFORM_POWER_LIMIT;
+               } else if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG) {
                        return PVC_GT0_PACKAGE_RAPL_LIMIT;
-               else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG))
+               } else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG)) {
                        return PCU_CR_PACKAGE_RAPL_LIMIT;
+               }
                break;
        case REG_PKG_POWER_SKU:
                if (xe->info.platform == XE_BATTLEMAGE)
@@ -114,12 +118,16 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
                        return GT_PERF_STATUS;
                break;
        case REG_PKG_ENERGY_STATUS:
-               if (xe->info.platform == XE_BATTLEMAGE && channel == CHANNEL_PKG)
-                       return BMG_PACKAGE_ENERGY_STATUS;
-               else if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG)
+               if (xe->info.platform == XE_BATTLEMAGE) {
+                       if (channel == CHANNEL_PKG)
+                               return BMG_PACKAGE_ENERGY_STATUS;
+                       else
+                               return BMG_PLATFORM_ENERGY_STATUS;
+               } else if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG) {
                        return PVC_GT0_PLATFORM_ENERGY_STATUS;
-               else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG))
+               } else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG)) {
                        return PCU_CR_PACKAGE_ENERGY_STATUS;
+               }
                break;
        default:
                drm_warn(&xe->drm, "Unknown xe hwmon reg id: %d\n", hwmon_reg);