arm64: dts: renesas: r8a779a0: Add CMT support

This patch adds CMT{0|1|2|3} device nodes for R-Car V3U (r8a779a0) SoC.

Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
[wsa: rebased, double checked values, corrected sorting]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210311092939.3129-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 3ab2f1523475057a4fcce45b576f4224b7db548b..6f3eba4653a3b8cb29ab7412931ae8cd7ee30a71 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -239,6 +239,76 @@
                        #interrupt-cells = <2>;
                };
 
+               cmt0: timer@e60f0000 {
+                       compatible = "renesas,r8a779a0-cmt0",
+                                    "renesas,rcar-gen3-cmt0";
+                       reg = <0 0xe60f0000 0 0x1004>;
+                       interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 910>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 910>;
+                       status = "disabled";
+               };
+
+               cmt1: timer@e6130000 {
+                       compatible = "renesas,r8a779a0-cmt1",
+                                    "renesas,rcar-gen3-cmt1";
+                       reg = <0 0xe6130000 0 0x1004>;
+                       interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 911>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 911>;
+                       status = "disabled";
+               };
+
+               cmt2: timer@e6140000 {
+                       compatible = "renesas,r8a779a0-cmt1",
+                                    "renesas,rcar-gen3-cmt1";
+                       reg = <0 0xe6140000 0 0x1004>;
+                       interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 912>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 912>;
+                       status = "disabled";
+               };
+
+               cmt3: timer@e6148000 {
+                       compatible = "renesas,r8a779a0-cmt1",
+                                    "renesas,rcar-gen3-cmt1";
+                       reg = <0 0xe6148000 0 0x1004>;
+                       interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 913>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+                       resets = <&cpg 913>;
+                       status = "disabled";
+               };
+
                cpg: clock-controller@e6150000 {
                        compatible = "renesas,r8a779a0-cpg-mssr";
                        reg = <0 0xe6150000 0 0x4000>;