}
 }
 
+static int dp83640_ts_info(struct phy_device *dev, struct ethtool_ts_info *info)
+{
+       struct dp83640_private *dp83640 = dev->priv;
+
+       info->so_timestamping =
+               SOF_TIMESTAMPING_TX_HARDWARE |
+               SOF_TIMESTAMPING_RX_HARDWARE |
+               SOF_TIMESTAMPING_RAW_HARDWARE;
+       info->phc_index = ptp_clock_index(dp83640->clock->ptp_clock);
+       info->tx_types =
+               (1 << HWTSTAMP_TX_OFF) |
+               (1 << HWTSTAMP_TX_ON) |
+               (1 << HWTSTAMP_TX_ONESTEP_SYNC);
+       info->rx_filters =
+               (1 << HWTSTAMP_FILTER_NONE) |
+               (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
+               (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
+               (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
+               (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
+               (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
+               (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
+               (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
+               (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
+               (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
+               (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
+               (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
+               (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);
+       return 0;
+}
+
 static struct phy_driver dp83640_driver = {
        .phy_id         = DP83640_PHY_ID,
        .phy_id_mask    = 0xfffffff0,
        .remove         = dp83640_remove,
        .config_aneg    = genphy_config_aneg,
        .read_status    = genphy_read_status,
+       .ts_info        = dp83640_ts_info,
        .hwtstamp       = dp83640_hwtstamp,
        .rxtstamp       = dp83640_rxtstamp,
        .txtstamp       = dp83640_txtstamp,