]> www.infradead.org Git - linux.git/commitdiff
ARM: dts: stm32: stm32mp151a-prtt1l: Fix QSPI configuration
authorOleksij Rempel <o.rempel@pengutronix.de>
Mon, 12 Aug 2024 10:41:42 +0000 (12:41 +0200)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Thu, 5 Sep 2024 09:31:55 +0000 (11:31 +0200)
Rename 'pins1' to 'pins' in the qspi_bk1_pins_a node to correct the
subnode name. The incorrect name caused the configuration to be
applied to the wrong subnode, resulting in QSPI not working properly.

Some additional changes was made:
- To avoid this kind of regression, all references to pin configuration
  nodes are now referenced directly using the format &{label/subnode}.
- /delete-property/ bias-disable; was added everywhere where bias-pull-up
  is used
- redundant properties like driver-push-pull are removed

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm/boot/dts/st/stm32mp151a-prtt1a.dts
arch/arm/boot/dts/st/stm32mp151a-prtt1c.dts
arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi
arch/arm/boot/dts/st/stm32mp151a-prtt1s.dts

index 75874eafde11ef6e46f93da8591b10cf8b53ceb1..8e1dd84e0c0a4fe046e246a61e1e7579eb6c0ee4 100644 (file)
        };
 };
 
-&pwm5_pins_a {
-       pins {
-               pinmux = <STM32_PINMUX('A', 0, AF2)>; /* TIM5_CH1 */
-       };
+&{pwm5_pins_a/pins} {
+       pinmux = <STM32_PINMUX('A', 0, AF2)>; /* TIM5_CH1 */
 };
 
-&pwm5_sleep_pins_a {
-       pins {
-               pinmux = <STM32_PINMUX('A', 0, ANALOG)>; /* TIM5_CH1 */
-       };
+&{pwm5_sleep_pins_a/pins} {
+       pinmux = <STM32_PINMUX('A', 0, ANALOG)>; /* TIM5_CH1 */
 };
 
 &timers5 {
index c90d815f906b8fff1be6895106ff98669641e899..3b33b7093b6868e9d717f118d796833268a076d0 100644 (file)
        status = "okay";
 };
 
-&sdmmc2_b4_od_pins_a {
-       pins1 {
-               pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
-                        <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
-                        <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
-                        <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
-       };
+&{sdmmc2_b4_od_pins_a/pins1} {
+       pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
+                <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
+                <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
+                <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
 };
 
-&sdmmc2_b4_pins_a {
-       pins1 {
-               pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
-                        <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
-                        <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
-                        <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
-                        <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
-       };
+&{sdmmc2_b4_pins_a/pins1} {
+       pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
+                <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
+                <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
+                <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
+                <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
 };
 
-&sdmmc2_b4_sleep_pins_a {
-       pins {
-               pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
-                        <STM32_PINMUX('B', 7, ANALOG)>, /* SDMMC2_D1 */
-                        <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
-                        <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
-                        <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
-                        <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
-       };
+&{sdmmc2_b4_sleep_pins_a/pins} {
+       pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
+                <STM32_PINMUX('B', 7, ANALOG)>, /* SDMMC2_D1 */
+                <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
+                <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
+                <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
+                <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
 };
 
-&sdmmc2_d47_pins_a {
-       pins {
-               pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
-                        <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
-                        <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
-                        <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
-       };
+&{sdmmc2_d47_pins_a/pins} {
+       pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
+                <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
+                <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
+                <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
 };
 
-&sdmmc2_d47_sleep_pins_a {
-       pins {
-               pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
-                        <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
-                        <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
-                        <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
-       };
+&{sdmmc2_d47_sleep_pins_a/pins} {
+       pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
+                <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
+                <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
+                <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
 };
 
 &sdmmc3 {
        };
 };
 
-&sdmmc3_b4_od_pins_b {
-       pins1 {
-               pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */
-                        <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */
-                        <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
-                        <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
-       };
+&{sdmmc3_b4_od_pins_b/pins1} {
+       pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */
+                <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */
+                <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
+                <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
 };
 
-&sdmmc3_b4_pins_b {
-       pins1 {
-               pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */
-                        <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */
-                        <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
-                        <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
-                        <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
-       };
+&{sdmmc3_b4_pins_b/pins1} {
+       pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */
+                <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */
+                <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
+                <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
+                <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
 };
 
-&sdmmc3_b4_sleep_pins_b {
-       pins {
-               pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* SDMMC3_D0 */
-                        <STM32_PINMUX('D', 4, ANALOG)>, /* SDMMC3_D1 */
-                        <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
-                        <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
-                        <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
-                        <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
-       };
+&{sdmmc3_b4_sleep_pins_b/pins} {
+       pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* SDMMC3_D0 */
+                <STM32_PINMUX('D', 4, ANALOG)>, /* SDMMC3_D1 */
+                <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
+                <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
+                <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
+                <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
 };
 
 &spi1 {
index 3938d357e198f47a1aecf41848c899ae1554e31c..98a31c2b5d456a0a449e191a313ee0ba26d5775b 100644 (file)
        status = "okay";
 };
 
-&ethernet0_rmii_pins_a {
-       pins1 {
-               pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */
-                        <STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */
-                        <STM32_PINMUX('B', 11, AF11)>; /* ETH1_RMII_TX_EN */
-       };
-       pins2 {
-               pinmux = <STM32_PINMUX('C', 4, AF11)>,  /* ETH1_RMII_RXD0 */
-                        <STM32_PINMUX('C', 5, AF11)>,  /* ETH1_RMII_RXD1 */
-                        <STM32_PINMUX('A', 1, AF11)>,  /* ETH1_RMII_REF_CLK input */
-                        <STM32_PINMUX('A', 7, AF11)>;  /* ETH1_RMII_CRS_DV */
-       };
+&{ethernet0_rmii_pins_a/pins1} {
+       pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */
+                <STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */
+                <STM32_PINMUX('B', 11, AF11)>; /* ETH1_RMII_TX_EN */
 };
 
-&ethernet0_rmii_sleep_pins_a {
-       pins1 {
-               pinmux = <STM32_PINMUX('B', 12, ANALOG)>, /* ETH1_RMII_TXD0 */
-                        <STM32_PINMUX('B', 13, ANALOG)>, /* ETH1_RMII_TXD1 */
-                        <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
-                        <STM32_PINMUX('C', 4, ANALOG)>,  /* ETH1_RMII_RXD0 */
-                        <STM32_PINMUX('C', 5, ANALOG)>,  /* ETH1_RMII_RXD1 */
-                        <STM32_PINMUX('A', 1, ANALOG)>,  /* ETH1_RMII_REF_CLK */
-                        <STM32_PINMUX('A', 7, ANALOG)>;  /* ETH1_RMII_CRS_DV */
-       };
+&{ethernet0_rmii_pins_a/pins2} {
+       pinmux = <STM32_PINMUX('C', 4, AF11)>,  /* ETH1_RMII_RXD0 */
+                <STM32_PINMUX('C', 5, AF11)>,  /* ETH1_RMII_RXD1 */
+                <STM32_PINMUX('A', 1, AF11)>,  /* ETH1_RMII_REF_CLK input */
+                <STM32_PINMUX('A', 7, AF11)>;  /* ETH1_RMII_CRS_DV */
+};
+
+&{ethernet0_rmii_sleep_pins_a/pins1} {
+       pinmux = <STM32_PINMUX('B', 12, ANALOG)>, /* ETH1_RMII_TXD0 */
+                <STM32_PINMUX('B', 13, ANALOG)>, /* ETH1_RMII_TXD1 */
+                <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
+                <STM32_PINMUX('C', 4, ANALOG)>,  /* ETH1_RMII_RXD0 */
+                <STM32_PINMUX('C', 5, ANALOG)>,  /* ETH1_RMII_RXD1 */
+                <STM32_PINMUX('A', 1, ANALOG)>,  /* ETH1_RMII_REF_CLK */
+                <STM32_PINMUX('A', 7, ANALOG)>;  /* ETH1_RMII_CRS_DV */
 };
 
 &iwdg2 {
        };
 };
 
-&qspi_bk1_pins_a {
-       pins1 {
-               bias-pull-up;
-               drive-push-pull;
-               slew-rate = <1>;
-       };
+&{qspi_bk1_pins_a/pins} {
+       /delete-property/ bias-disable;
+       bias-pull-up;
+       drive-push-pull;
+       slew-rate = <1>;
 };
 
 &rng1 {
        status = "okay";
 };
 
-&sdmmc1_b4_od_pins_a {
-       pins1 {
-               bias-pull-up;
-       };
-       pins2 {
-               bias-pull-up;
-       };
+&{sdmmc1_b4_od_pins_a/pins1} {
+       /delete-property/ bias-disable;
+       bias-pull-up;
 };
 
-&sdmmc1_b4_pins_a {
-       pins1 {
-               bias-pull-up;
-       };
-       pins2 {
-               bias-pull-up;
-       };
+&{sdmmc1_b4_od_pins_a/pins2} {
+       /delete-property/ bias-disable;
+       bias-pull-up;
+};
+
+&{sdmmc1_b4_pins_a/pins1} {
+       /delete-property/ bias-disable;
+       bias-pull-up;
+};
+
+&{sdmmc1_b4_pins_a/pins2} {
+       /delete-property/ bias-disable;
+       bias-pull-up;
 };
 
 &uart4 {
        status = "okay";
 };
 
-&uart4_idle_pins_a {
-       pins1 {
-               pinmux = <STM32_PINMUX('B', 9, ANALOG)>; /* UART4_TX */
-       };
-       pins2 {
-               pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
-               bias-pull-up;
-       };
+&{uart4_idle_pins_a/pins1} {
+       pinmux = <STM32_PINMUX('B', 9, ANALOG)>; /* UART4_TX */
 };
 
-&uart4_pins_a {
-       pins1 {
-               pinmux = <STM32_PINMUX('B', 9, AF8)>; /* UART4_TX */
-               bias-disable;
-               drive-push-pull;
-               slew-rate = <0>;
-       };
-       pins2 {
-               pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
-               bias-pull-up;
-       };
+&{uart4_idle_pins_a/pins2} {
+       pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
+       /delete-property/ bias-disable;
+       bias-pull-up;
 };
 
-&uart4_sleep_pins_a {
-       pins {
-               pinmux = <STM32_PINMUX('B', 9, ANALOG)>, /* UART4_TX */
-                       <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
-       };
+&{uart4_pins_a/pins1} {
+       pinmux = <STM32_PINMUX('B', 9, AF8)>; /* UART4_TX */
+       slew-rate = <0>;
+};
+
+&{uart4_pins_a/pins2} {
+       pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
+       /delete-property/ bias-disable;
+       bias-pull-up;
+};
+
+&{uart4_sleep_pins_a/pins} {
+       pinmux = <STM32_PINMUX('B', 9, ANALOG)>, /* UART4_TX */
+               <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
 };
 
 &usbh_ehci {
index ad25929e64e6e0be04d979f27adb9bbaf9a12653..b6be61b159e72b9e4620fd7252be30527def805a 100644 (file)
        };
 };
 
-&i2c1_pins_a {
-       pins {
-               pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
-                        <STM32_PINMUX('D', 13, AF5)>; /* I2C1_SDA */
-       };
+&{i2c1_pins_a/pins} {
+       pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
+                <STM32_PINMUX('D', 13, AF5)>; /* I2C1_SDA */
 };
 
-&i2c1_sleep_pins_a {
-       pins {
-               pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
-                        <STM32_PINMUX('D', 13, ANALOG)>; /* I2C1_SDA */
-       };
+&{i2c1_sleep_pins_a/pins} {
+       pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
+                <STM32_PINMUX('D', 13, ANALOG)>; /* I2C1_SDA */
 };
 
 &mdio0 {