drm/amd/display: get remote dpcd caps for timing validation

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index e27ed4a45265290690604b10e6d4df4fbee77514..80d9153334dc5f084c21870b85c39815c9873930 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -1869,7 +1869,7 @@ enum dc_status dc_link_validate_mode_timing(
                const struct dc_crtc_timing *timing)
 {
        uint32_t max_pix_clk = stream->sink->dongle_max_pix_clk;
-       struct dc_dongle_caps *dongle_caps = &link->link_status.dpcd_caps->dongle_caps;
+       struct dc_dongle_caps *dongle_caps = &link->dpcd_caps.dongle_caps;
 
        /* A hack to avoid failing any modes for EDID override feature on
         * topology change such as lower quality cable for DP or different dongle

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index e6bf05d76a942d0f764c224e9480acc5f07b7950..b2dcc462afe230d5afe1ed4227f7a52cae88e2c5 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2127,7 +2127,7 @@ static void get_active_converter_info(
 
                                union dwnstream_port_caps_byte3_hdmi
                                        hdmi_caps = {.raw = det_caps[3] };
-                               union dwnstream_port_caps_byte1
+                               union dwnstream_port_caps_byte2
                                        hdmi_color_caps = {.raw = det_caps[2] };
                                link->dpcd_caps.dongle_caps.dp_hdmi_max_pixel_clk =
                                        det_caps[1] * 25000;

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 79e2ddbc339952743d34dd320ac3b70e42568a3a..ee05b8ee37856a68299bfac4b61d096d6e9c23dc 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -1031,6 +1031,7 @@ struct dc_sink {
 
        /* private to dc_sink.c */
        struct kref refcount;
+
 };
 
 void dc_sink_retain(struct dc_sink *sink);

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
index 77e2de69cca3b5a62927f8e6f723215aaae25235..2726b02e006bca55f2b5c8c3296c5532ee1f88bc 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
@@ -255,7 +255,7 @@ enum dpcd_downstream_port_detailed_type {
        DOWN_STREAM_DETAILED_DP_PLUS_PLUS
 };
 
-union dwnstream_port_caps_byte1 {
+union dwnstream_port_caps_byte2 {
        struct {
                uint8_t MAX_BITS_PER_COLOR_COMPONENT:2;
                uint8_t RESERVED:6;
@@ -298,6 +298,32 @@ union dwnstream_port_caps_byte3_hdmi {
 
 /*4-byte structure for detailed capabilities of a down-stream port
 (DP-to-TMDS converter).*/
+union dwnstream_portxcaps {
+       struct {
+               union dwnstream_port_caps_byte0 byte0;
+               unsigned char max_TMDS_clock;   //byte1
+               union dwnstream_port_caps_byte2 byte2;
+
+               union {
+                       union dwnstream_port_caps_byte3_dvi byteDVI;
+                       union dwnstream_port_caps_byte3_hdmi byteHDMI;
+               } byte3;
+       } bytes;
+
+       unsigned char raw[4];
+};
+
+union downstream_port {
+       struct {
+               unsigned char   present:1;
+               unsigned char   type:2;
+               unsigned char   format_conv:1;
+               unsigned char   detailed_caps:1;
+               unsigned char   reserved:3;
+       } bits;
+       unsigned char raw;
+};
+
 
 union sink_status {
        struct {