arm64: sysreg: Add system instructions trapped by HFGIRT2_EL2

Add the new CMOs trapped by HFGITR2_EL2.

Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index a943eac446938c69544cbf7028ddbb0efcbd3d50..8908eec48f3135caf3a7270a7c69059b4fd95bd5 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -117,6 +117,7 @@
 
 #define SB_BARRIER_INSN                        __SYS_BARRIER_INSN(0, 7, 31)
 
+/* Data cache zero operations */
 #define SYS_DC_ISW                     sys_insn(1, 0, 7, 6, 2)
 #define SYS_DC_IGSW                    sys_insn(1, 0, 7, 6, 4)
 #define SYS_DC_IGDSW                   sys_insn(1, 0, 7, 6, 6)
@@ -153,11 +154,13 @@
 #define SYS_DC_CIGVAC                  sys_insn(1, 3, 7, 14, 3)
 #define SYS_DC_CIGDVAC                 sys_insn(1, 3, 7, 14, 5)
 
-/* Data cache zero operations */
 #define SYS_DC_ZVA                     sys_insn(1, 3, 7, 4, 1)
 #define SYS_DC_GVA                     sys_insn(1, 3, 7, 4, 3)
 #define SYS_DC_GZVA                    sys_insn(1, 3, 7, 4, 4)
 
+#define SYS_DC_CIVAPS                  sys_insn(1, 0, 7, 15, 1)
+#define SYS_DC_CIGDVAPS                        sys_insn(1, 0, 7, 15, 5)
+
 /*
  * Automatically generated definitions for system registers, the
  * manual encodings below are in the process of being converted to