sparc64: perf: make sure we do not set the 'picnht' bit in the PCR

Testing with the perf_fuzzer tool revealed an issue when the 'picnht' bit
was set in the Performance Control Register. Setting this bit means that
privileged software cannot access the PIC counter and we eventually end up
with messages of the form shown below, being reported.

NMI watchdog: BUG: soft lockup - CPU#788 stuck for 23s! [perf_fuzzer:336548]

This commit fixes the issue my making sure that the 'picnht' bit
is always reset when writing to the PCR register.

Orabug: 24926097

Signed-off-by: Dave Aldridge <david.j.aldridge@oracle.com>
Signed-off-by: Allen Pais <allen.pais@oracle.com>

diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index 53de9db051543e20ab9ef3655624ef691cf16c23..db78d73571d7b6662b40057ff1dbc4c0f2581aa5 100644 (file)
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -177,6 +177,7 @@ struct sparc_pmu {
        int                             upper_shift;
        int                             lower_shift;
        int                             event_mask;
+       int                             picnht_bit;
        int                             user_bit;
        int                             priv_bit;
        int                             hv_bit;
@@ -974,6 +975,7 @@ static const struct sparc_pmu sparc_m7_pmu = {
        .upper_shift    = 5,
        .lower_shift    = 5,
        .event_mask     = 0x7ff,
+       .picnht_bit     = PCR_N4_PICNHT,
        .user_bit       = PCR_N4_UTRACE,
        .priv_bit       = PCR_N4_STRACE,
 
@@ -1160,8 +1162,8 @@ static const struct sparc_pmu sparc_m8_pmu = {
        .upper_shift    = 5,
        .lower_shift    = 5,
        .event_mask     = 0x3fff,
+       .picnht_bit     = PCR_M8_PICNHT,
        .user_bit       = PCR_M8_UTRACE,
-
        .priv_bit       = PCR_M8_STRACE,
 
        /* We explicitly don't support hypervisor tracing. */
@@ -1216,6 +1218,11 @@ static inline void sparc_pmu_enable_event(struct cpu_hw_events *cpuc,
        val = cpuc->pcr[pcr_idx];
        val &= ~mask;
        val |= event_encoding(enc, event_idx);
+
+       /* In order for privileged software to access
+        * the PIC the 'picnht' bit needs to be reset
+        */
+       val &= ~(sparc_pmu->picnht_bit);
        cpuc->pcr[pcr_idx] = val;
 
        pcr_ops->write_pcr(pcr_idx, cpuc->pcr[pcr_idx]);