{
        struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
        struct pci_dev *pci = to_pci_dev(sdev->dev);
 +      const struct sof_dsp_power_state target_state = {
 +              .state = SOF_DSP_PM_D0,
 +              .substate = SOF_HDA_DSP_PM_D0I0,
 +      };
 +      int ret;
  
 -      if (sdev->s0_suspend) {
 +      /* resume from D0I3 */
 +      if (sdev->dsp_power_state.state == SOF_DSP_PM_D0) {
+               hda_codec_i915_display_power(sdev, true);
+ 
 +              /* Set DSP power state */
 +              ret = hda_dsp_set_power_state(sdev, &target_state);
 +              if (ret < 0) {
 +                      dev_err(sdev->dev, "error: setting dsp state %d substate %d\n",
 +                              target_state.state, target_state.substate);
 +                      return ret;
 +              }
 +
                /* restore L1SEN bit */
                if (hda->l1_support_changed)
                        snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
        struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
        struct hdac_bus *bus = sof_to_bus(sdev);
        struct pci_dev *pci = to_pci_dev(sdev->dev);
 +      const struct sof_dsp_power_state target_dsp_state = {
 +              .state = target_state,
 +              .substate = target_state == SOF_DSP_PM_D0 ?
 +                              SOF_HDA_DSP_PM_D0I3 : 0,
 +      };
        int ret;
  
 -      if (sdev->s0_suspend) {
 +      /* cancel any attempt for DSP D0I3 */
 +      cancel_delayed_work_sync(&hda->d0i3_work);
 +
 +      if (target_state == SOF_DSP_PM_D0) {
+               /* we can't keep a wakeref to display driver at suspend */
+               hda_codec_i915_display_power(sdev, false);
+ 
 +              /* Set DSP power state */
 +              ret = hda_dsp_set_power_state(sdev, &target_dsp_state);
 +              if (ret < 0) {
 +                      dev_err(sdev->dev, "error: setting dsp state %d substate %d\n",
 +                              target_dsp_state.state,
 +                              target_dsp_state.substate);
 +                      return ret;
 +              }
 +
                /* enable L1SEN to make sure the system can enter S0Ix */
                hda->l1_support_changed =
                        snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,