[REG_IND_DATA_HI]               = 0x71,
        [REG_IND_DATA_LO]               = 0x75,
        [REG_IND_MIB_CHECK]             = 0x74,
+       [REG_IND_BYTE]                  = 0xA0,
        [P_FORCE_CTRL]                  = 0x0C,
        [P_LINK_STATUS]                 = 0x0E,
        [P_LOCAL_CTRL]                  = 0x07,
                           bits, set ? bits : 0);
 }
 
+static int ksz8_ind_write8(struct ksz_device *dev, u8 table, u16 addr, u8 data)
+{
+       struct ksz8 *ksz8 = dev->priv;
+       const u8 *regs = ksz8->regs;
+       u16 ctrl_addr;
+       int ret = 0;
+
+       mutex_lock(&dev->alu_mutex);
+
+       ctrl_addr = IND_ACC_TABLE(table) | addr;
+       ret = ksz_write8(dev, regs[REG_IND_BYTE], data);
+       if (!ret)
+               ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
+
+       mutex_unlock(&dev->alu_mutex);
+
+       return ret;
+}
+
 static int ksz8_reset_switch(struct ksz_device *dev)
 {
        if (ksz_is_ksz88x3(dev)) {
        }
 }
 
+static int ksz8_handle_global_errata(struct dsa_switch *ds)
+{
+       struct ksz_device *dev = ds->priv;
+       int ret = 0;
+
+       /* KSZ87xx Errata DS80000687C.
+        * Module 2: Link drops with some EEE link partners.
+        *   An issue with the EEE next page exchange between the
+        *   KSZ879x/KSZ877x/KSZ876x and some EEE link partners may result in
+        *   the link dropping.
+        */
+       if (dev->ksz87xx_eee_link_erratum)
+               ret = ksz8_ind_write8(dev, TABLE_EEE, REG_IND_EEE_GLOB2_HI, 0);
+
+       return ret;
+}
+
 static int ksz8_setup(struct dsa_switch *ds)
 {
        struct ksz_device *dev = ds->priv;
 
        ds->configure_vlan_while_not_filtering = false;
 
-       return 0;
+       return ksz8_handle_global_errata(ds);
 }
 
 static void ksz8_get_caps(struct dsa_switch *ds, int port,
        int num_statics;
        int cpu_ports;
        int port_cnt;
+       bool ksz87xx_eee_link_erratum;
 };
 
 static const struct ksz_chip_data ksz8_switch_chips[] = {
                .num_statics = 8,
                .cpu_ports = 0x10,      /* can be configured as cpu port */
                .port_cnt = 5,          /* total cpu and user ports */
+               .ksz87xx_eee_link_erratum = true,
        },
        {
                /*
                .num_statics = 8,
                .cpu_ports = 0x10,      /* can be configured as cpu port */
                .port_cnt = 4,          /* total cpu and user ports */
+               .ksz87xx_eee_link_erratum = true,
        },
        {
                .chip_id = 0x8765,
                .num_statics = 8,
                .cpu_ports = 0x10,      /* can be configured as cpu port */
                .port_cnt = 5,          /* total cpu and user ports */
+               .ksz87xx_eee_link_erratum = true,
        },
        {
                .chip_id = 0x8830,
                        dev->host_mask = chip->cpu_ports;
                        dev->port_mask = (BIT(dev->phy_port_cnt) - 1) |
                                         chip->cpu_ports;
+                       dev->ksz87xx_eee_link_erratum =
+                               chip->ksz87xx_eee_link_erratum;
                        break;
                }
        }