struct sys_reg_params *p,
                const struct sys_reg_desc *r)
 {
-       kvm_inject_undefined(vcpu);
+       struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
+       u64 now = kvm_phys_timer_read();
+
+       if (p->is_write)
+               ptimer->cnt_cval = p->regval + now;
+       else
+               p->regval = ptimer->cnt_cval - now;
+
        return true;
 }
 
                struct sys_reg_params *p,
                const struct sys_reg_desc *r)
 {
-       kvm_inject_undefined(vcpu);
+       struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
+
+       if (p->is_write) {
+               /* ISTATUS bit is read-only */
+               ptimer->cnt_ctl = p->regval & ~ARCH_TIMER_CTRL_IT_STAT;
+       } else {
+               u64 now = kvm_phys_timer_read();
+
+               p->regval = ptimer->cnt_ctl;
+               /*
+                * Set ISTATUS bit if it's expired.
+                * Note that according to ARMv8 ARM Issue A.k, ISTATUS bit is
+                * UNKNOWN when ENABLE bit is 0, so we chose to set ISTATUS bit
+                * regardless of ENABLE bit for our implementation convenience.
+                */
+               if (ptimer->cnt_cval <= now)
+                       p->regval |= ARCH_TIMER_CTRL_IT_STAT;
+       }
+
        return true;
 }
 
                struct sys_reg_params *p,
                const struct sys_reg_desc *r)
 {
-       kvm_inject_undefined(vcpu);
+       struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
+
+       if (p->is_write)
+               ptimer->cnt_cval = p->regval;
+       else
+               p->regval = ptimer->cnt_cval;
+
        return true;
 }