#define BM_USBPHY_CTRL_SFTRST                  BIT(31)
 #define BM_USBPHY_CTRL_CLKGATE                 BIT(30)
+#define BM_USBPHY_CTRL_OTG_ID_VALUE            BIT(27)
 #define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS       BIT(26)
 #define BM_USBPHY_CTRL_ENAUTOCLR_USBCLKGATE    BIT(25)
 #define BM_USBPHY_CTRL_ENVBUSCHG_WKUP          BIT(23)
                usleep_range(500, 1000);
 }
 
+static bool mxs_phy_is_otg_host(struct mxs_phy *mxs_phy)
+{
+       void __iomem *base = mxs_phy->phy.io_priv;
+       u32 phyctrl = readl(base + HW_USBPHY_CTRL);
+
+       if (IS_ENABLED(CONFIG_USB_OTG) &&
+                       !(phyctrl & BM_USBPHY_CTRL_OTG_ID_VALUE))
+               return true;
+
+       return false;
+}
+
 static void mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool on)
 {
        bool vbus_is_on = false;
 
        vbus_is_on = mxs_phy_get_vbus_status(mxs_phy);
 
-       if (on && !vbus_is_on)
+       if (on && !vbus_is_on && !mxs_phy_is_otg_host(mxs_phy))
                __mxs_phy_disconnect_line(mxs_phy, true);
        else
                __mxs_phy_disconnect_line(mxs_phy, false);