drm/i915/gt: Avoid using tag 0 for the very first submission

Assume that the HW starts off with tag 0 "active" and so avoid using tag
0 for our own first ELSP submission.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191229183153.3719869-2-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 723914a41ef4ab160def9bd44f31f2d747ce649e..14e7e179855f0d20e8d10821f439005711fd8016 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1108,7 +1108,7 @@ __execlists_schedule_in(struct i915_request *rq)
                /* We don't need a strict matching tag, just different values */
                ce->lrc_desc &= ~GENMASK_ULL(47, 37);
                ce->lrc_desc |=
-                       (u64)(engine->context_tag++ % NUM_CONTEXT_TAG) <<
+                       (u64)(++engine->context_tag % NUM_CONTEXT_TAG) <<
                        GEN11_SW_CTX_ID_SHIFT;
                BUILD_BUG_ON(NUM_CONTEXT_TAG > GEN12_MAX_CONTEXT_HW_ID);
        }
@@ -2925,6 +2925,8 @@ static void enable_execlists(struct intel_engine_cs *engine)
                        RING_HWS_PGA,
                        i915_ggtt_offset(engine->status_page.vma));
        ENGINE_POSTING_READ(engine, RING_HWS_PGA);
+
+       engine->context_tag = 0;
 }
 
 static bool unexpected_starting_state(struct intel_engine_cs *engine)