drm/nouveau: pass generic subdev to calculation routines

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nv04.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nv04.c
index b7fd1151166e0adcedec217fed8e186ce5ab2cd8..3c2fb68255a8baa35cee7b80d23eeaa0eec400f5 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/clock/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nv04.c
@@ -297,7 +297,7 @@ nv04_clock_pll_calc(struct nouveau_clock *clock, struct nvbios_pll *info,
                    int clk, struct nouveau_pll_vals *pv)
 {
        int N1, M1, N2, M2, P;
-       int ret = nv04_pll_calc(clock, info, clk, &N1, &M1, &N2, &M2, &P);
+       int ret = nv04_pll_calc(nv_subdev(clock), info, clk, &N1, &M1, &N2, &M2, &P);
        if (ret) {
                pv->refclk = info->refclk;
                pv->N1 = N1;

diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c
index f4147f67eda687da04a128ec49ea9de2e40a15bd..5e9d5e283dc46e8250d0b2f7b5d6cf13beb7bff0 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c
@@ -47,7 +47,7 @@ nv50_clock_pll_set(struct nouveau_clock *clk, u32 type, u32 freq)
                return ret;
        }
 
-       ret = nv04_pll_calc(clk, &info, freq, &N1, &M1, &N2, &M2, &P);
+       ret = nv04_pll_calc(nv_subdev(clk), &info, freq, &N1, &M1, &N2, &M2, &P);
        if (!ret) {
                nv_error(clk, "failed pll calculation\n");
                return ret;

diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
index 9068c98b96f64f2f8c0c5a18d478400d09855553..2cedfd7020a045f5f29052cba5ec1a9add8d231d 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
@@ -45,7 +45,7 @@ nva3_clock_pll_set(struct nouveau_clock *clk, u32 type, u32 freq)
        if (ret)
                return ret;
 
-       ret = nva3_pll_calc(clk, &info, freq, &N, &fN, &M, &P);
+       ret = nva3_pll_calc(nv_subdev(clk), &info, freq, &N, &fN, &M, &P);
        if (ret < 0)
                return ret;
 
@@ -72,7 +72,7 @@ nva3_clock_pll_calc(struct nouveau_clock *clock, struct nvbios_pll *info,
 {
        int ret, N, M, P;
 
-       ret = nva3_pll_calc(clock, info, clk, &N, NULL, &M, &P);
+       ret = nva3_pll_calc(nv_subdev(clock), info, clk, &N, NULL, &M, &P);
 
        if (ret > 0) {
                pv->refclk = info->refclk;

diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c
index 7c9626258a467029cf3bc7b63b37429dfa0e4fa8..495b21f2766208af229e93d93e929bf4b677bcf7 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c
@@ -45,7 +45,7 @@ nvc0_clock_pll_set(struct nouveau_clock *clk, u32 type, u32 freq)
        if (ret)
                return ret;
 
-       ret = nva3_pll_calc(clk, &info, freq, &N, &fN, &M, &P);
+       ret = nva3_pll_calc(nv_subdev(clk), &info, freq, &N, &fN, &M, &P);
        if (ret < 0)
                return ret;
 

diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/pll.h b/drivers/gpu/drm/nouveau/core/subdev/clock/pll.h
index ef2c0078f337155a1e093c8cb5d8c5b71b967638..445b14c33a98c19499a56646f2e5aa4a7535a4f9 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/clock/pll.h
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/pll.h
@@ -1,9 +1,9 @@
 #ifndef __NOUVEAU_PLL_H__
 #define __NOUVEAU_PLL_H__
 
-int nv04_pll_calc(struct nouveau_clock *, struct nvbios_pll *, u32 freq,
+int nv04_pll_calc(struct nouveau_subdev *, struct nvbios_pll *, u32 freq,
                  int *N1, int *M1, int *N2, int *M2, int *P);
-int nva3_pll_calc(struct nouveau_clock *, struct nvbios_pll *, u32 freq,
+int nva3_pll_calc(struct nouveau_subdev *, struct nvbios_pll *, u32 freq,
                  int *N, int *fN, int *M, int *P);
 
 #endif

diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/pllnv04.c b/drivers/gpu/drm/nouveau/core/subdev/clock/pllnv04.c
index a2ab6d051ba8668f7db2f5a8a8284d3ec85c0dc2..cf1ed0dc9bc987d7c7b9436f80aebd22236eb793 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/clock/pllnv04.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/pllnv04.c
@@ -21,14 +21,13 @@
  * SOFTWARE.
  */
 
-#include <subdev/clock.h>
 #include <subdev/bios.h>
 #include <subdev/bios/pll.h>
 
 #include "pll.h"
 
 static int
-getMNP_single(struct nouveau_clock *clock, struct nvbios_pll *info, int clk,
+getMNP_single(struct nouveau_subdev *subdev, struct nvbios_pll *info, int clk,
              int *pN, int *pM, int *pP)
 {
        /* Find M, N and P for a single stage PLL
@@ -39,7 +38,7 @@ getMNP_single(struct nouveau_clock *clock, struct nvbios_pll *info, int clk,
         * "clk" parameter in kHz
         * returns calculated clock
         */
-       int cv = nouveau_bios(clock)->version.chip;
+       int cv = nouveau_bios(subdev)->version.chip;
        int minvco = info->vco1.min_freq, maxvco = info->vco1.max_freq;
        int minM = info->vco1.min_m, maxM = info->vco1.max_m;
        int minN = info->vco1.min_n, maxN = info->vco1.max_n;
@@ -124,7 +123,7 @@ getMNP_single(struct nouveau_clock *clock, struct nvbios_pll *info, int clk,
 }
 
 static int
-getMNP_double(struct nouveau_clock *clock, struct nvbios_pll *info, int clk,
+getMNP_double(struct nouveau_subdev *subdev, struct nvbios_pll *info, int clk,
              int *pN1, int *pM1, int *pN2, int *pM2, int *pP)
 {
        /* Find M, N and P for a two stage PLL
@@ -135,7 +134,7 @@ getMNP_double(struct nouveau_clock *clock, struct nvbios_pll *info, int clk,
         * "clk" parameter in kHz
         * returns calculated clock
         */
-       int chip_version = nouveau_bios(clock)->version.chip;
+       int chip_version = nouveau_bios(subdev)->version.chip;
        int minvco1 = info->vco1.min_freq, maxvco1 = info->vco1.max_freq;
        int minvco2 = info->vco2.min_freq, maxvco2 = info->vco2.max_freq;
        int minU1 = info->vco1.min_inputfreq, minU2 = info->vco2.min_inputfreq;
@@ -223,20 +222,20 @@ getMNP_double(struct nouveau_clock *clock, struct nvbios_pll *info, int clk,
 }
 
 int
-nv04_pll_calc(struct nouveau_clock *clk, struct nvbios_pll *info, u32 freq,
+nv04_pll_calc(struct nouveau_subdev *subdev, struct nvbios_pll *info, u32 freq,
              int *N1, int *M1, int *N2, int *M2, int *P)
 {
        int ret;
 
        if (!info->vco2.max_freq) {
-               ret = getMNP_single(clk, info, freq, N1, M1, P);
+               ret = getMNP_single(subdev, info, freq, N1, M1, P);
                *N2 = 1;
                *M2 = 1;
        } else {
-               ret = getMNP_double(clk, info, freq, N1, M1, N2, M2, P);
+               ret = getMNP_double(subdev, info, freq, N1, M1, N2, M2, P);
        }
 
        if (!ret)
-               nv_error(clk, "unable to compute acceptable pll values\n");
+               nv_error(subdev, "unable to compute acceptable pll values\n");
        return ret;
 }

diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/pllnva3.c b/drivers/gpu/drm/nouveau/core/subdev/clock/pllnva3.c
index eed5c16cf610a0d531fe3c5424b3df20eec1f5b1..4497378ba1e8ccc8a0c6b454ded279ae9d34a7e1 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/clock/pllnva3.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/pllnva3.c
@@ -29,7 +29,7 @@
 #include "pll.h"
 
 int
-nva3_pll_calc(struct nouveau_clock *clock, struct nvbios_pll *info,
+nva3_pll_calc(struct nouveau_subdev *subdev, struct nvbios_pll *info,
              u32 freq, int *pN, int *pfN, int *pM, int *P)
 {
        u32 best_err = ~0, err;
@@ -72,7 +72,7 @@ nva3_pll_calc(struct nouveau_clock *clock, struct nvbios_pll *info,
        }
 
        if (unlikely(best_err == ~0)) {
-               nv_error(clock, "unable to find matching pll values\n");
+               nv_error(subdev, "unable to find matching pll values\n");
                return -EINVAL;
        }