]> www.infradead.org Git - linux.git/commitdiff
ARM: dts: imx6qdl: align pin config nodes with bindings
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 2 Sep 2024 11:40:40 +0000 (13:40 +0200)
committerShawn Guo <shawnguo@kernel.org>
Tue, 3 Sep 2024 08:23:20 +0000 (16:23 +0800)
Bindings for other NXP pin controllers expect pin configuration nodes in
pinctrl to match certain naming, so adjust these as well, even though
their bindings are not yet in dtschema format.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
15 files changed:
arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-icore-rqs.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-var-dart.dtsi
arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi

index 758eaf9d93d2a44c1cc8cb457a82005aabcf4fec..f7fac86f0a6bc15ac5332bc34f5214d6aef07347 100644 (file)
                >;
        };
 
-       pinctrl_gpmi_nand: gpmi-nand {
+       pinctrl_gpmi_nand: gpminandgrp {
                fsl,pins = <
                        MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1
                        MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1
index 082a2e3a391fe9a87d3b23789a0fd7ed63993116..b57f4073f881e3c5c47f71793d5307a87747c850 100644 (file)
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x170b9
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
index 8ec442038ea01a33ba636932298f914bfecf5828..090c0057d1179efb0e0224f641808e01e3c652bf 100644 (file)
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
index 9df9f79affae7e8dac1c410c592d5bb6ee91b92f..0ed6d25024a24ce1fb559a6ce8d26b895133bdcf 100644 (file)
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
index 7f16c602cc0757ab9a1cbd8f19f0d5ad29457495..c6e231de674aa35f0f3d6e4bd90838573d5606a0 100644 (file)
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
index 7693f92195d50fe70ea40702ec0372c2c95053d4..d0f648938cae784f1db2d53658150359436044a4 100644 (file)
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
index 9d0836df0fed417ad7481b44ceae21c984ea7ce6..71911df881ccca150cd445454ae5d9c9062732ff 100644 (file)
                >;
        };
 
-       pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+       pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x4001b0b0 /* EMMY_EN */
                        MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x4001b0b0 /* EMMY_CFG1# */
                >;
        };
 
-       pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+       pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD2_CMD__SD2_CMD             0x170b9
                        MX6QDL_PAD_SD2_CLK__SD2_CLK             0x100b9
                >;
        };
 
-       pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+       pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD2_CMD__SD2_CMD             0x170f9
                        MX6QDL_PAD_SD2_CLK__SD2_CLK             0x100f9
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
index f4cb9e1d34a9ac23748c452d90172dfdaf740091..716c324a745809bc091511d46634191bfafe0ffb 100644 (file)
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
index 424dc7fcd53352a599a5899c39dc726e99ad8724..453dee4d9227f0fbe4b664699240eefa379eeb4b 100644 (file)
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x170b9
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
index 49ea25c7196766d0e3c54fc5d9f7f27a2b04b51c..add700bc11cc19807afca30d057bddb1d9dda8cd 100644 (file)
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
index d339957cc09730297bbf3b672985dbd070f5493b..dff184a119f37272725d636b52cad2f967b65a86 100644 (file)
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD    0x170B1
                        MX6QDL_PAD_SD3_CLK__SD3_CLK    0x100B1
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD    0x170F9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK    0x100F9
                >;
        };
 
-       pinctrl_usdhc4_100mhz: usdhc4grp_100mhz {
+       pinctrl_usdhc4_100mhz: usdhc4-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170B1
                        MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100B1
                >;
        };
 
-       pinctrl_usdhc4_200mhz: usdhc4grp_200mhz {
+       pinctrl_usdhc4_200mhz: usdhc4-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170F9
                        MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100F9
index 55fb7b90422096b33682189bda4121c485afd869..35b6bec7a3fab62f4fd18dba267e5e5c1834284a 100644 (file)
                        >;
                };
 
-               pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+               pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                        fsl,pins = <
                                MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
                                MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
                        >;
                };
 
-               pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+               pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                        fsl,pins = <
                                MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
                                MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
index e2fe337f7d9ed6eae042516d8db1665764768470..5a194f4c0cb9b3109184e3325d0d19ddeaeed597 100644 (file)
                >;
        };
 
-       pinctrl_disp0_1: disp0grp-1 {
+       pinctrl_disp0_1: disp0-1-grp {
                fsl,pins = <
                        MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
                        MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
                >;
        };
 
-       pinctrl_disp0_2: disp0grp-2 {
+       pinctrl_disp0_2: disp0-2-grp {
                fsl,pins = <
                        MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
                        MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
index 200559d7158dc0b7c507471f02895a20d2ce6d1c..d8283eade43e7cfda690e8f33ddb561959016364 100644 (file)
                >;
        };
 
-       pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+       pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD1_CMD__SD1_CMD     0x170B9
                        MX6QDL_PAD_SD1_CLK__SD1_CLK     0x100B9
                >;
        };
 
-       pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+       pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD1_CMD__SD1_CMD     0x170F9
                        MX6QDL_PAD_SD1_CLK__SD1_CLK     0x100F9
index a1ea33c4eeb75c549777181c5f98fe9fb8e3232e..59833e8d11d862091a76c304277a8549982b22a3 100644 (file)
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp100mhzgrp {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD     0x170B9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK     0x100B9
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp200mhzgrp {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD     0x170F9
                        MX6QDL_PAD_SD3_CLK__SD3_CLK     0x100F9