unicore32-softmmu: Add ps2 support

This patch adds ps2/keyboard support, and enables CONFIG_PCKBD.

Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

diff --git a/default-configs/unicore32-softmmu.mak b/default-configs/unicore32-softmmu.mak
index 4d4fbfc8cd7815fd207f0371c642d1d21c46ae87..de38577a35ec65a6d599b0157b01b8fe50ea541e 100644 (file)
--- a/default-configs/unicore32-softmmu.mak
+++ b/default-configs/unicore32-softmmu.mak
@@ -1,3 +1,4 @@
 # Default configuration for unicore32-softmmu
 CONFIG_PUV3=y
 CONFIG_PTIMER=y
+CONFIG_PCKBD=y

diff --git a/hw/puv3.c b/hw/puv3.c
index 9acfc5a38b3974f3999ec6a562850712f390c937..271df97d3b6c749bd7de9eb0f86490b386412259 100644 (file)
--- a/hw/puv3.c
+++ b/hw/puv3.c
@@ -38,6 +38,7 @@ static void puv3_soc_init(CPUUniCore32State *env)
 {
     qemu_irq *cpu_intc, irqs[PUV3_IRQS_NR];
     DeviceState *dev;
+    MemoryRegion *i8042 = g_new(MemoryRegion, 1);
     int i;
 
     /* Initialize interrupt controller */
@@ -57,6 +58,10 @@ static void puv3_soc_init(CPUUniCore32State *env)
             irqs[PUV3_IRQS_GPIOLOW4], irqs[PUV3_IRQS_GPIOLOW5],
             irqs[PUV3_IRQS_GPIOLOW6], irqs[PUV3_IRQS_GPIOLOW7],
             irqs[PUV3_IRQS_GPIOHIGH], NULL);
+
+    /* Keyboard (i8042), mouse disabled for nographic */
+    i8042_mm_init(irqs[PUV3_IRQS_PS2_KBD], NULL, i8042, PUV3_REGS_OFFSET, 4);
+    memory_region_add_subregion(get_system_memory(), PUV3_PS2_BASE, i8042);
 }
 
 static void puv3_board_init(CPUUniCore32State *env, ram_addr_t ram_size)